Thin Film Capacitor Dielectric Stack Grain Structure
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Solution Overview
Problem
The fabrication of tunable ferroelectric capacitors often results in hillock and dendrite formations, leading to reduced breakdown voltage and capacitor failure, which are not effectively addressed by existing technologies.
Innovation Solution
A thin film capacitor with multiple stacked dielectric layers is fabricated, featuring a first dielectric layer with a columnar-oriented grain structure, a second layer with a randomly-oriented grain structure, and a third layer with a columnar-oriented grain structure, deposited at different temperatures to suppress hillock and dendrite formations, and improve time-dependent dielectric breakdown.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If conventional fabrication methods are used for tunable ferroelectric capacitors, then manufacturing simplicity is maintained, but hillock and dendrite formations occur leading to reduced breakdown voltage and capacitor failure
Solution Approach 1:
The dielectric layer is segmented into multiple sub-layers (first dielectric layer, second dielectric layer, third dielectric layer) with different grain structures. This segmentation allows each layer to serve specific functions: the first and third layers with columnar grains suppress hillock formation at electrode interfaces, while the second layer with random grains suppresses dendrite formation in the bulk, thereby resolving the contradiction between reliability and structural complexity
Solution Approach 2:
The patent employs a composite dielectric structure combining different grain orientations (columnar and random) within the same dielectric material system. This composite approach leverages the beneficial properties of each grain structure type to simultaneously address multiple failure mechanisms (hillocks and dendrites), improving breakdown voltage without requiring entirely different materials
2Reliability
If single-layer dielectric structure is used, then manufacturing process is simple, but dendrite growth causes capacitor failure
Solution Approach 1:
The dielectric layer is divided into three distinct layers with different grain structures. The second dielectric layer with randomly-oriented grains specifically targets and suppresses dendrite formation in the bulk of the capacitor, while maintaining overall structural integrity. This segmentation resolves the contradiction by distributing different protective functions across multiple layers
3Manufacturing precision
If high temperature deposition is used, then dielectric layer quality is improved, but hillock formation on electrodes occurs reducing breakdown voltage
Solution Approach 1:
The deposition process is segmented into multiple steps with different temperature regimes. The first dielectric layer is deposited at a first temperature to suppress hillock formation, while subsequent layers are deposited at different temperatures to optimize their respective grain structures. This temporal and thermal segmentation allows each layer to be optimized for its specific function without causing harmful effects to other layers
Solution Approach 2:
Different regions of the dielectric stack are given different local qualities through varying deposition temperatures. The first layer near the electrode interface receives controlled deposition conditions to prevent hillock formation, while other layers receive conditions optimized for their specific grain structure requirements, resolving the contradiction between local quality requirements
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The approach effectively reduces or eliminates hillock and dendrite formations, enhances the breakdown voltage, and minimizes charge trapping, thereby improving the reliability and performance of the ferroelectric capacitors.
Implementation Method 1
depositing a first dielectric layer on a first electrode layer utilizing a first process that is performed at a first temperature
Implementation Method 2
depositing a second dielectric layer on the first dielectric layer utilizing a second process that forms a randomly-oriented grain structure for the second dielectric layer
Implementation Method 3
depositing a third dielectric layer on the second dielectric layer utilizing a third process that is performed at a second temperature and that forms a columnar-oriented grain structure for the third dielectric layer
Data Source
AI summary
A system that incorporates teachings of the subject disclosure may include, for example, a fabricated thin film capacitor formed by depositing a first dielectric layer on a first electrode layer utilizing a first process that is performed at a first temperature, depositing a second dielectric layer on the first dielectric layer utilizing a second process that forms a randomly-oriented grain structure for the second dielectric layer, depositing a third dielectric layer on the second dielectric layer utilizing a third process that is performed at a second temperature and that forms a columnar-oriented grain structure for the third dielectric layer where the second temperature is higher than the first temperature, and depositing a second electrode layer on the third dielectric layer to form the thin film capacitor. Other embodiments are disclosed.