Capacitor Dielectric Structure for Voltage Coefficient and Patterning
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Solution Overview
Problem
Microelectronic devices face challenges in achieving high capacitance density, low capacitance variation with voltage, high reliability, and compatibility with interconnect patterning steps for capacitors with a metal lower plate, particularly in maintaining these characteristics simultaneously.
Innovation Solution
A capacitor dielectric layer structure comprising a lower silicon dioxide layer, a silicon oxy-nitride layer with an average index of refraction of 1.60 to 1.75, and an upper silicon dioxide layer is used, along with an upper plate recessed from the lateral perimeter, providing an anti-reflection layer and enabling efficient patterning and reliable operation.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If a capacitor dielectric layer is formed over an interconnect metal lower plate, then capacitance density is improved, but compatibility with interconnect patterning steps deteriorates due to reflections during photolithography
Solution Approach 1:
An anti-reflection layer is introduced as an intermediary component between the capacitor dielectric layer and the photoresist. This layer mediates the interaction by absorbing or preventing reflections during photolithography, thereby resolving the conflict between achieving high capacitance density and maintaining compatibility with patterning steps.
Solution Approach 2:
The capacitor structure employs a composite dielectric layer comprising multiple materials (silicon dioxide, silicon oxy-nitride, and silicon nitride) with different optical and electrical properties. This composite structure enables simultaneous optimization of capacitance density and anti-reflection characteristics for photolithography compatibility.
2Quantity of substance
If the capacitor dielectric layer thickness is increased to improve capacitance density, then capacitance density is improved, but reliability deteriorates due to increased stress and manufacturing complexity
Solution Approach 1:
The capacitor dielectric layer is segmented into multiple thinner sub-layers (lower silicon dioxide layer, silicon oxy-nitride layer, upper silicon dioxide layer) rather than using a single thick layer. This segmentation reduces stress accumulation while maintaining the required capacitance density, thereby improving reliability.
Solution Approach 2:
The multi-layer dielectric structure uses composite materials with different mechanical and electrical properties. The silicon oxy-nitride layer acts as a stress buffer between the silicon dioxide layers, reducing overall stress and improving device reliability while achieving high capacitance density.
3Device complexity
If a single-layer capacitor dielectric is used, then manufacturing complexity is reduced, but capacitance density and voltage coefficient performance deteriorate
Solution Approach 1:
The patent employs a composite dielectric layer with three distinct materials (silicon dioxide, silicon oxy-nitride, and silicon nitride) to achieve superior capacitance density and voltage coefficient performance. Each material contributes specific properties that collectively optimize the capacitor's electrical characteristics.
Solution Approach 2:
Different regions of the dielectric layer have different material compositions optimized for specific functions: the lower silicon dioxide layer provides interface quality, the silicon oxy-nitride layer provides high dielectric constant for capacitance density, and the upper silicon dioxide layer provides stability. This local optimization of material properties achieves high performance.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The structure achieves a capacitance density greater than 1.2 fF/μm², a breakdown voltage greater than 20 volts, and minimal capacitance variation over a voltage range, ensuring reliable operation for over 10 years under operating conditions.
Implementation Method 1
The capacitor dielectric layer provides an anti-reflection layer on the lower plate, where exposed by the upper plate, at a wavelength of 248 nanometers
Data Source
AI summary
A microelectronic device includes a capacitor having a lower plate of interconnect metal, a capacitor dielectric layer with a lower silicon dioxide layer, a silicon oxy-nitride layer, and an upper silicon dioxide layer, and an upper plate over the upper silicon dioxide layer. The silicon oxy-nitride layer has an average index of refraction of 1.60 to 1.75 at a wavelength of 248 nanometers. To form the microelectronic device, the lower silicon dioxide layer, the silicon oxy-nitride layer, and the upper silicon dioxide layer are formed in sequence over an interconnect metal layer. An upper plate layer is patterned to form the upper plate, leaving the lower silicon dioxide layer and at least half of the silicon oxy-nitride layer over the interconnect metal layer. An interconnect mask is formed of photoresist over the upper plate and the silicon oxy-nitride layer, using the silicon oxy-nitride layer as an anti-reflection layer.