Capacitor External Electrode Periphery Design for Parasitic Capacitance Reduction
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Capacitors in RF circuits experience decreased Q value due to parasitic capacitance from protective layers, which fluctuate with temperature and humidity changes, affecting their performance.
Innovation Solution
A capacitor design where the external electrode is formed only in the periphery of the upper electrode, preventing capacitive coupling with the protective layer, thus reducing parasitic capacitance and maintaining a high Q value even at high temperature or high humidity.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If the external electrode extends beyond the upper electrode region, then electrical connection is improved, but parasitic capacitance increases and Q value decreases
Solution Approach 1:
The harmful external electrode is extracted from the region that causes parasitic capacitance. The external electrode is designed to extend only to the periphery of the upper electrode in plan view, separating its electrical connection function from the capacitance-generating region, thereby eliminating protective layer capacitance while maintaining electrical connectivity.
2Ease of operation
If the external electrode is positioned close to the lower electrode, then electrical connection is facilitated, but capacitive coupling with the protective layer increases
Solution Approach 1:
The upper electrode serves as an intermediary that mediates between the external electrode and the lower electrode. By positioning the external electrode to contact only the upper electrode's periphery and not extending toward the lower electrode, the upper electrode acts as a buffer that enables electrical connection while preventing direct capacitive coupling between the external electrode and lower electrode through the protective layer.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The design effectively eliminates the influence of protective layer capacitance and substrate capacitance, maintaining a high Q value and improving insulation tolerance, regardless of environmental conditions.
Implementation Method 1
a dielectric film on the lower electrode, an upper electrode on a part of the dielectric film
Implementation Method 2
the external electrode and the lower electrode may come close to each other, thereby leading to capacitive coupling with a protective layer (also referred to as an interlayer film) interposed therebetween. As a result, parasitic capacitance made by the external electrode, the protective layer, and the lower electrode is generated
Data Source
AI summary
A capacitor that includes a substrate, a lower electrode on the substrate, a dielectric film on the lower electrode, an upper electrode on a part of the dielectric film, a protective layer that covers the lower electrode and the upper electrode, and an external electrode that penetrates the protective layer. The external electrode is formed only in a region defined by a periphery of the upper electrode in a plan view of the capacitor viewed from an upper surface thereof towards the substrate.