Capacitor Electrode Structure for Void-Free Embedded Package Molding
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Solution Overview
Problem
In semiconductor package structures using embedded trace substrates, the low clearance between capacitors and prepreg layers can lead to voids during the molding process due to the embedded electrode pads, which affects the reliability and performance of electronic devices.
Innovation Solution
The capacitor design incorporates external electrodes with prevention portions that protrude or recess inwardly, allowing for increased solder volume in the lower region, thereby enhancing the clearance between the capacitor and the substrate and reducing the occurrence of voids during molding.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Volume of moving object
If the capacitor is mounted close to the prepreg layer to achieve miniaturization, then the device size is reduced, but voids occur during the molding process
Solution Approach 1:
The invention introduces a vertical dimension solution by forming protrusions on the external electrodes that extend downward into the solder layer. This vertical protrusion structure increases the effective height of the external electrode, creating additional space for solder in the lower region without increasing the horizontal footprint of the capacitor, thus maintaining miniaturization while preventing voids during molding
Solution Approach 2:
The protrusions on the external electrodes are formed in advance during the capacitor manufacturing process, before mounting. This preliminary structural modification ensures that when the capacitor is mounted and soldered, the protrusions automatically create the necessary space for adequate solder volume, preventing void formation during the subsequent molding process
2Length of stationary object
If the clearance between the capacitor and prepreg layer is reduced for miniaturization, then the device becomes more compact, but voids form during molding
Solution Approach 1:
Instead of increasing the horizontal clearance distance between the capacitor and prepreg layer, the invention utilizes the vertical dimension by adding protrusions that extend downward from the external electrodes. This allows the capacitor to maintain minimal clearance to the prepreg layer while the protrusions create internal space for solder, eliminating voids without compromising the compact horizontal layout
3Reliability
If the external electrode structure is modified to prevent voids, then molding quality improves, but the electrode structure becomes more complex
Solution Approach 1:
The invention applies local quality modification by adding protrusions only to specific regions of the external electrodes where void formation is most likely to occur (the lower regions near the solder interface). The rest of the electrode structure remains simple and conventional, thus improving molding quality without substantially increasing overall structural complexity
Data Source
AI summary
Provided is a capacitor including a ceramic main body, an internal electrode inside the ceramic main body, and a plurality of external electrodes respectively on a first surface and a second surface that are opposite to each other in a horizontal direction of the ceramic main body. Each of the plurality of external electrodes includes one or more prevention portions protruding in an outward direction of the ceramic main body or recessed in an inward direction of the ceramic main body.