Capacitor-Embedded Substrate With Comb-Shaped Electrodes
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Existing capacitor-embedded substrates face challenges in achieving high capacitance due to limitations in permittivity, size, and manufacturing complexity, which restricts their effectiveness in reducing crosstalk noise and switching noise in high-speed semiconductor packages.
Innovation Solution
A capacitor-embedded substrate is designed with conductors forming comb-shaped patterns penetrating through a base material, utilizing an insulating layer as the dielectric, allowing for increased facing area and capacitance while maintaining a compact form and reducing manufacturing complexity.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If a high-permittivity insulating resin sheet is used to increase capacitance, then the capacitance value increases, but the permittivity is still limited compared to ceramic capacitors and requires larger electrode facing area
Solution Approach 1:
The patent transitions from planar electrode arrangements to a three-dimensional stacked configuration where multiple insulating sheets and conductor layers are layered vertically. This dimensional change allows capacitance to be increased by adding layers in the thickness direction rather than expanding electrode area, effectively overcoming the permittivity limitation of resin materials.
Solution Approach 2:
The patent employs a composite structure combining multiple insulating sheets (which may have different materials or properties) with conductor layers. This composite approach allows optimization of each layer's properties and achieves higher overall capacitance by stacking multiple capacitor units in series/parallel configurations within the same footprint.
2Quantity of substance
If the electrode facing area is increased to achieve larger capacitance, then capacitance increases, but the area occupied by electrodes in conductor layers increases, impairing the degree of freedom of other wirings
Solution Approach 1:
The invention resolves this contradiction by moving the capacitance enhancement from the planar dimension to the vertical dimension. By stacking multiple insulating sheets and conductor layers, the electrode facing area remains compact while capacitance increases through the accumulation of multiple layered capacitor units, preserving wiring freedom in the horizontal plane.
3Adaptability or versatility
If an equivalent capacitative device is provided inside a package instead of a chip capacitor, then design freedom of wiring pattern is improved, but the capacitance value is limited by the substrate material permittivity
Solution Approach 1:
The patent maintains design freedom by embedding the capacitor structure within the substrate while using composite materials - multiple insulating sheets with different properties stacked with conductor layers. This achieves higher capacitance values than single-material substrates while keeping the capacitor integrated in the substrate, preserving the benefits of embedded design.
4Quantity of substance
If multiple insulating layers and conductor layers are stacked alternately to increase electrode facing area, then capacitance increases, but the layers must be formed one by one in build-up process, increasing process time and cost
Solution Approach 1:
The patent applies preliminary action by pre-assembling the insulating sheets and conductor layers into a integrated capacitor structure before embedding it in the substrate. This preliminary formation of the multi-layer capacitor unit reduces the need for sequential layer-by-layer formation during the main substrate fabrication process, thereby reducing overall process time and complexity.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This configuration enhances capacitance, reduces inductance, and simplifies the manufacturing process, contributing to improved noise reduction and increased wiring freedom, making it suitable for high-speed semiconductor applications.
Implementation Method 1
an insulating layer interposed therebetween
Data Source
AI summary
A capacitor-embedded substrate includes a base material having a desired thickness, and a pair of conductors (feedthrough electrodes) each formed in a desired pattern to penetrate through the base material in the thickness direction thereof, and oppositely disposed with an insulating layer interposed therebetween. The pair of electrodes are formed in comb-shaped patterns, and are oppositely disposed in such a manner that respective comb-tooth portions are meshed with each other.


