Capacitor Structure Mitigating Systematic Mismatch in Multiple Patterning
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Solution Overview
Problem
Conventional capacitive arrays in digital to analog converters face challenges in achieving accurate matching and minimizing differential nonlinearity errors, particularly due to systematic mismatches caused by multiple patterning technology nodes, which affect the size and efficiency of the capacitor array.
Innovation Solution
The design incorporates sub-unit capacitor structures with secondary effect capacitors, forming fractional capacitor values at non-overlapped locations within the unit capacitor, allowing for precise alignment and error mitigation, utilizing metal-on-metal capacitor structures compatible with multiple patterning technology nodes, and dividing capacitance values into integer-based multiples and divisions to achieve compact array size and accurate matching.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If conventional large capacitive arrays are used to improve matching accuracy, then matching accuracy is improved, but silicon area occupied increases
Solution Approach 1:
The unit capacitor structure is segmented into multiple non-overlapped locations within the same physical footprint, allowing fractional capacitor values to be formed without increasing overall array area. This segmentation enables multiple capacitive elements to share the same spatial region while maintaining electrical independence.
Solution Approach 2:
The patent utilizes the third dimension (vertical stacking) by forming capacitors at different locations within the unit capacitor structure, effectively moving from a two-dimensional planar arrangement to a three-dimensional configuration. This allows fractional capacitors to coexist with the unit capacitor in the same planar area by utilizing vertical separation and non-overlapped spatial regions.
2Area of stationary object
If small capacitive array size is used to reduce silicon area, then silicon area is reduced, but matching accuracy deteriorates
Solution Approach 1:
Multiple capacitor functions (unit capacitor and fractional sub-unit capacitors) are merged into a single unified structure with shared terminals and common fabrication processes. This merging allows the system to achieve high matching accuracy through correlated error mitigation while maintaining a compact footprint, as all capacitors benefit from identical manufacturing variations.
Solution Approach 2:
The patent changes the capacitance value parameter by forming fractional values through geometric scaling (e.g., 1/2, 1/4, 1/8 of unit capacitance) rather than using separate discrete capacitor structures. This parameter transformation enables precise capacitance control while maintaining area efficiency and leveraging process correlations for improved matching.
3Manufacturing precision
If multiple patterning technology is used to achieve smaller feature sizes, then manufacturing precision is improved, but systematic mismatch increases
Solution Approach 1:
The patent performs preliminary error analysis and compensation by deliberately designing the capacitor array to account for expected systematic mismatches from multiple patterning. By pre-characterizing the error patterns and incorporating compensation strategies into the design, the system mitigates the impact of manufacturing variations before they affect device performance.
Solution Approach 2:
The patent transforms the capacitance values into fractional relationships (1/2, 1/4, 1/8, etc.) that can be systematically scaled from a unit capacitor. This parameter transformation creates a hierarchical structure where all capacitors derive from the same base design, allowing systematic errors to correlate rather than randomize, thereby improving matching despite multiple patterning variations.
Data Source
AI summary
Capacitor arrays and methods of operating a digital to analog converter are described. In an embodiment, a capacitor array includes a unit capacitor (Cu) structure characterized by a unit capacitance value, a plurality of different super-unit capacitor structures, and a plurality of different sub-unit capacitor structures, each different sub-unit capacitor structure having a different capacitance defined by a division of the unit capacitance value.