Capacitor Module Layout Within the PN Region for Lower Height

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Solution Overview

Problem

Existing power conversion devices face challenges in miniaturizing the capacitor module to reduce height, as noise absorbing capacitors and ground bus bars often protrude from the PN region, hindering the compact design of both the capacitor module and the overall power conversion device.

Innovation Solution

The capacitor module is designed with the entire noise absorbing capacitor and ground bus bar arranged within the PN region, ensuring they do not protrude, allowing for a reduced height in the direction perpendicular to the electrode surface of the smoothing capacitor, and thus miniaturizing the capacitor module and the power conversion device.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Length of moving object

If the capacitor module is miniaturized to reduce height, then the overall device size is reduced, but the noise absorbing capacitor and ground bus bar cannot be properly arranged within the PN region

Engineering Contradiction:
Improveheight of capacitor moduleVSAvoidarrangement complexity of noise absorbing capacitor and ground bus bar
Core Design Contradiction:
Length of moving objectVSDevice complexity

Solution Approach 1:

The patent applies dimensional reorganization by arranging the noise absorbing capacitor and ground bus bar within the PN region defined by the smoothing capacitor's electrode surfaces. This spatial constraint in a specific dimensional region (the PN region between P-side and N-side virtual planes) enables compact integration without increasing overall height, effectively using dimensional planning to resolve the contradiction between miniaturization and component arrangement complexity

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

2Length of moving object

If the noise absorbing capacitor and ground bus bar are arranged within the PN region, then the capacitor module height is reduced, but the arrangement space for these components is constrained

Engineering Contradiction:
Improveheight of capacitor moduleVSAvoidarrangement space within PN region
Core Design Contradiction:
Length of moving objectVSArea of stationary object

Solution Approach 1:

The patent implements nesting by placing the noise absorbing capacitor and ground bus bar inside the PN region defined by the smoothing capacitor's electrode surfaces. This nested arrangement allows multiple components to occupy overlapping or adjacent spatial zones without increasing the overall envelope dimensions, effectively reducing the capacitor module height while accommodating all necessary components within the constrained PN region

Inventive Principle:
Principle #7Nested doll (Nesting)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This configuration effectively miniaturizes the capacitor module and power conversion device by ensuring the noise absorbing capacitor and ground bus bars are contained within the PN region, reducing the overall height and enhancing the compactness of the device.

Implementation Method 1

a smoothing capacitor connected to an upper and lower arm circuit that generates and outputs AC power, and configured to smooth voltage pulsations

Methodology Applied
Scientific EffectCapacitance: Capacitance

Implementation Method 2

a noise absorbing capacitor connected to the upper and lower arm circuit, and configured to absorb noise

Methodology Applied
Scientific EffectCapacitance: Capacitance

Data Source

PatentUS12095353B2Capacitor module and power conversion device
Publication Date: 2024.09.17 DENSO CORP
  • US12095353B2 patent drawing
  • US12095353B2 patent drawing
  • US12095353B2 patent drawing

AI summary

A capacitor module includes a smoothing capacitor, a P-side Y capacitor and a N-side Y capacitor as noise absorbing capacitors, a capacitor case, a P-side bus bar, a N-side bus bar, and a ground bus bar. A virtual plane along a P-side electrode surface, which is an electrode surface on a high potential side of the smoothing capacitor, is referred to as a P-side virtual plane. A virtual plane along a N-side electrode surface, which is an electrode surface on a low potential side of the smoothing capacitor, is referred to as a N-side virtual plane. A region between the P-side virtual plane and the N-side virtual plane is defined as a PN region. The entire noise absorbing capacitor and the entire ground bus bar are arranged in the PN region.