Capacitor Noise Reduction via Asymmetric Voltage Transition Rates

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Solution Overview

Problem

Electronic systems experience noise issues, particularly 'singing capacitor' noise, due to rapid changes in supply voltage during performance state transitions, which existing power management techniques fail to adequately mitigate.

Innovation Solution

A rate control circuit is introduced to split voltage reduction requests into smaller increments, sequentially conveyed to the power management circuit, reducing the average rate of supply voltage decrease, thereby minimizing noise.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If the supply voltage is increased rapidly to improve performance response time, then the productivity is improved, but capacitor-induced noise increases

Engineering Contradiction:
Improveperformance response timeVSAvoidcapacitor-induced noise
Core Design Contradiction:
ProductivityVSObject-generated harmful factors

Solution Approach 1:

The patent applies dynamics by making the voltage transition rate adjustable rather than fixed. The system dynamically changes the rate of voltage change based on whether the transition is increasing or decreasing performance state, allowing optimal balance between response time and noise reduction for different operational scenarios

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The patent changes the parameter of voltage transition rate asymmetrically - using a faster rate for voltage increases and a slower rate for voltage decreases. This parameter change resolves the contradiction by allowing rapid response when needed while preventing noise during voltage reduction

Inventive Principle:
Principle #35Parameter changes

2Loss of energy

If the supply voltage is reduced quickly to lower power consumption, then the energy efficiency is improved, but acoustic noise increases

Engineering Contradiction:
Improvepower consumptionVSAvoidacoustic noise
Core Design Contradiction:
Loss of energyVSObject-generated harmful factors

Solution Approach 1:

The system dynamically adjusts the voltage transition characteristics based on direction, applying different rates for increasing versus decreasing voltage. This resolves the contradiction between quick power reduction and noise prevention by slowing down voltage reduction transitions

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The patent changes the temporal parameter of voltage transition by applying asymmetric ramp rates - slower reduction rates that prevent capacitor noise while still achieving power savings, contrasting with faster increase rates

Inventive Principle:
Principle #35Parameter changes

3Object-generated harmful factors

If asymmetric voltage transition rates are applied to reduce noise, then the acoustic noise is reduced, but the device complexity increases

Engineering Contradiction:
Improveacoustic noiseVSAvoidpower management circuit complexity
Core Design Contradiction:
Object-generated harmful factorsVSDevice complexity

Solution Approach 1:

The patent introduces a rate control circuit as an intermediary between the performance state change request and the power management circuit. This intermediary component manages the complexity by handling the asymmetric rate control logic separately, allowing the main power management circuit to remain relatively simple

Inventive Principle:
Principle #24Intermediary (Mediator)

Data Source

PatentUS10416692B2Method and apparatus for reducing capacitor-induced noise
Publication Date: 2019.09.17 APPLE INC
  • US10416692B2 patent drawing
  • US10416692B2 patent drawing
  • US10416692B2 patent drawing

AI summary

A method and apparatus for reducing capacitor noise in electronic systems is disclosed. A system includes at least one functional circuit block coupled to receive a variable supply voltage. The value of the supply voltage is controlled by a power management circuit. Changing a performance state of the functional circuit block includes increasing the supply voltage for higher performance, and reducing the supply voltage for reduced performance demands. The power management circuit, in changing to a higher performance state, increases the supply voltage at a first rate. A rate control circuit causes the power management circuit to reduce the supply voltage, when changing to a lower performance state, at a second rate that is less than the first rate.