Semiconductor Capacitor Opening Sealing Against CMP Short Circuits

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Solution Overview

Problem

In semiconductor manufacturing, the critical dimensions of capacitors can be enlarged during the etching process, leading to short circuits between capacitors, and there is a need to protect the lower electrode plate during chemical-mechanical polishing (CMP) to prevent CMP slurry from entering the openings between capacitors.

Innovation Solution

A semiconductor structure is formed with a dielectric stack, a poly layer, and an ALD oxide layer that seals the top portion of the opening, preventing CMP slurry from entering and protecting the lower electrode plate, using a method that includes forming a substrate with an active region and isolation structure, depositing multiple oxide and nitride layers, etching to create an opening, and sealing it with an ALD oxide layer.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Manufacturing precision

If the hardmask is etched by etching gas, then the capacitor dimensions can be enlarged, but short circuits between capacitors occur

Engineering Contradiction:
Improvecapacitor dimensionsVSAvoidshort circuit prevention
Core Design Contradiction:
Manufacturing precisionVSReliability

Solution Approach 1:

The patent applies preliminary action by depositing the ALD oxide layer on the sidewalls of the opening before the CMP process. This pre-formed protective layer prevents CMP slurry from entering the opening and contacting the lower electrode plate, thereby preventing short circuits while allowing the capacitor dimensions to be properly formed through subsequent etching processes

Inventive Principle:
Principle #10Preliminary action

2Manufacturing precision

If CMP process is performed to polish the lower electrode plate, then the electrode surface is planarized, but CMP slurry enters the openings and causes short circuits

Engineering Contradiction:
Improveelectrode surface flatnessVSAvoidshort circuit prevention
Core Design Contradiction:
Manufacturing precisionVSReliability

Solution Approach 1:

The patent introduces an intermediary substance - the ALD oxide layer - that is deposited on the sidewalls of the opening. This intermediary layer acts as a barrier between the CMP slurry and the lower electrode plate, allowing the CMP process to planarize the electrode surface while preventing slurry from entering the opening and causing short circuits

Inventive Principle:
Principle #24Intermediary (Mediator)

3Ease of manufacture

If the opening is left open for electrode deposition, then the lower electrode can be formed, but the electrode plate is exposed to CMP slurry during polishing

Engineering Contradiction:
Improveelectrode formationVSAvoidCMP slurry contamination
Core Design Contradiction:
Ease of manufactureVSObject-affected harmful factors

Solution Approach 1:

The patent applies local quality by selectively depositing the ALD oxide layer only on the sidewalls of the opening where it is needed for protection. The opening remains open at the top for electrode deposition, but the sidewalls are locally modified with the protective oxide layer that prevents CMP slurry from entering and contaminating the lower electrode plate during subsequent polishing

Inventive Principle:
Principle #3Local quality

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The ALD oxide layer effectively seals the opening, preventing CMP slurry from entering and ensuring the integrity of the lower electrode plate, thereby preventing short circuits and maintaining the precision of capacitor dimensions.

Implementation Method 1

an ALD oxide layer is deposited on a sidewall of the opening

Methodology Applied
Scientific EffectAtomic Layer Deposition: Chemical Vapour Deposition

Implementation Method 2

The poly layer and the dielectric stack are etched to form an opening to expose the contact of the substrate

Methodology Applied
Scientific EffectEtching: Ablation

Implementation Method 3

A conductive film is formed in the opening

Methodology Applied
Scientific EffectPhysical Vapour Deposition: Physical Vapour Deposition

Data Source

PatentUS11830907B2Semiconductor structure and method of forming the same
Publication Date: 2023.11.28 NAN YA TECH
  • US11830907B2 patent drawing
  • US11830907B2 patent drawing
  • US11830907B2 patent drawing

AI summary

A method of forming a semiconductor structure includes following steps. A substrate is provided. The substrate has an active region, an isolation structure adjacent to the active region, and a contact on the active region. A dielectric stack is formed on the substrate. A poly layer is formed on the dielectric stack. The poly layer and the dielectric stack are etched to form an opening to expose the contact of the substrate. A conductive film is formed in the opening and an ALD oxide layer is deposited on a sidewall of the opening. In addition, a semiconductor structure is also disclosed herein.