Capacitor Structure with Patterned Reinforcing Layer
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
The challenge in manufacturing DRAM capacitors is to increase memory capacitance while maintaining structural strength, as smaller capacitor dimensions lead to weakened structural integrity and increased risk of toppling or collapsing during the wet etching process, which decreases yield rates.
Innovation Solution
A manufacturing method involving a semiconductor substrate with a laminate structure that includes a patterned reinforcing layer with reinforcing structures to define alignment apertures, supporting layers, and deep trenches to form lower electrodes, which enhances structural strength and allows for self-aligning capacitor placement, thereby increasing capacitance and yield.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Area of moving object
If the capacitor dimension is decreased to increase memory density, then the memory capacitance must be increased, but the structural strength is weakened causing toppling or collapsing during wet etching process
Solution Approach 1:
The patent introduces a multi-layer laminate structure comprising alternating sacrificial layers and reinforcing layers. The reinforcing layers are segmented into discrete reinforcing structures (such as pillars or walls) positioned at specific locations around the electrode. This segmentation allows the structure to provide localized strength support without occupying excessive space, thus maintaining small capacitor dimensions while preventing electrode toppling during wet etching processes.
Solution Approach 2:
The patent employs a composite laminate structure combining different materials with complementary properties. The sacrificial layers (e.g., silicon oxide) and reinforcing layers (e.g., silicon nitride) are deposited alternately to create a composite structure. The reinforcing layer material is specifically selected to provide higher mechanical strength and structural support, while the sacrificial layer is removed later to form the final capacitor structure. This composite approach enables small-dimensional capacitors to maintain sufficient structural strength.
2Length of moving object
If the electrode height is increased to increase capacitance, then the capacitance increases, but the aspect ratio increases causing toppling or collapsing due to surface tension of etching solution
Solution Approach 1:
The patent applies preliminary action by forming the reinforcing structures within the laminate structure before the wet etching process is performed. The reinforcing layers are deposited and patterned in advance to create structural support elements that will be present during the critical wet etching step. These pre-formed reinforcing structures provide immediate structural support to the high-aspect-ratio electrode, preventing toppling or collapsing when the electrode is exposed to the etching solution.
Solution Approach 2:
The reinforcing structures act as intermediary elements between the electrode and the wet etching process. Rather than directly strengthening the electrode material itself, the patent introduces separate reinforcing structures that mediate the structural support function. These intermediary reinforcing elements (formed from the reinforcing layers) bear the mechanical load and prevent electrode collapse, allowing the electrode to maintain its high-aspect-ratio geometry necessary for high capacitance.
3Length of moving object
If the dielectric layer thickness is decreased to increase capacitance, then the capacitance increases, but the manufacturing precision requirements increase
Solution Approach 1:
The patent addresses manufacturing precision challenges by changing the parameter of dielectric layer thickness to extremely thin dimensions (on the order of nanometers). By using advanced deposition techniques, the patent achieves precise control over the thin dielectric layer thickness, enabling high capacitance values. The laminate structure with reinforcing layers provides a stable framework that facilitates this precise thickness control, as the alternating deposition process allows for accurate monitoring and adjustment of each layer's thickness.
Data Source
AI summary
The instant disclosure relates to a semiconductor device which includes a semiconductor substrate, at least one patterned reinforcing layer, a plurality of lower electrodes, and a supporting layer. The at least one patterned reinforcing layer is arranged above the semiconductor substrate, wherein the at least one patterned reinforcing layer has a plurality of reinforcing structures configured to define a plurality of alignment apertures. The lower electrodes are arranged on the semiconductor substrate, wherein N of the lower electrodes pass through each of the alignment apertures, where N is an integer greater than or equal to 1. The supporting layer is arranged above the at least one patterned reinforcing layer and between the lower electrodes.