Capacitor Fabrication Using Sacrificial Layer Linewidth Control

Solution Overview

Problem

Conventional semiconductor manufacturing processes face challenges in forming storage node openings with precise linewidth and uniformity, particularly as integration density increases, due to the complexity and low productivity of spacer patterning and double patterning technologies, which also complicate the etch process and sidewall profile control.

Innovation Solution

A method that forms preliminary openings with a wider linewidth using a hard mask pattern without spacer or double patterning technology, followed by reducing the linewidth using a sacrificial layer, and then forming storage nodes and a support pattern to alleviate etch process burden and improve sidewall profile control.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Manufacturing precision

If spacer patterning technology or double patterning technology is used to form openings with required linewidth, then manufacturing precision is improved, but device complexity and productivity are worsened due to increased procedural steps

Engineering Contradiction:

Improvelinewidth precisionVSAvoidprocedural complexity

Core Design Contradiction:

Manufacturing precisionVSDevice complexity

Solution Approach 1:

The patent segments the linewidth control process into two distinct stages: first forming preliminary openings with a relatively wide linewidth using a hard mask pattern, then forming a sacrificial layer on the sidewalls of these preliminary openings to define the final precise linewidth. This segmentation allows each stage to be optimized independently, avoiding the complexity of direct fine-linewidth patterning.

Inventive Principle:

Principle #1Segmentation

Solution Approach 2:

The patent performs preliminary action by first forming the hard mask pattern and preliminary openings with a wider linewidth before introducing the sacrificial layer. This preliminary structure serves as a template that guides the subsequent formation of the final precise openings, simplifying the overall patterning process while maintaining manufacturing precision.

Inventive Principle:

Principle #10Preliminary action

2Manufacturing precision

If spacer patterning technology or double patterning technology is used to form openings with required linewidth, then manufacturing precision is improved, but productivity is worsened due to increased procedural steps

Engineering Contradiction:

Improvelinewidth precisionVSAvoidproduction efficiency

Core Design Contradiction:

Manufacturing precisionVSProductivity

Solution Approach 1:

The patent segments the linewidth control process into two distinct stages: first forming preliminary openings with a relatively wide linewidth using a hard mask pattern, then forming a sacrificial layer on the sidewalls of these preliminary openings to define the final precise linewidth. This segmentation allows each stage to be optimized independently, avoiding the complexity of direct fine-linewidth patterning.

Inventive Principle:

Principle #1Segmentation

Solution Approach 2:

The patent performs preliminary action by first forming the hard mask pattern and preliminary openings with a wider linewidth before introducing the sacrificial layer. This preliminary structure serves as a template that guides the subsequent formation of the final precise openings, simplifying the overall patterning process while maintaining manufacturing precision.

Inventive Principle:

Principle #10Preliminary action

3Ease of manufacture

If conventional etch process is used to form openings through multiple layers, then manufacturing capability is maintained, but etch process burden increases and sidewall profile control becomes difficult

Engineering Contradiction:

Improveetch process simplicityVSAvoidsidewall profile control

Core Design Contradiction:

Ease of manufactureVSManufacturing precision

Solution Approach 1:

The patent introduces a sacrificial layer as an intermediary element formed on the sidewalls of the preliminary openings. This sacrificial layer acts as a mediator that defines the final opening linewidth and protects the sidewalls during subsequent etching processes, thereby simplifying the etch process while improving sidewall profile control and manufacturing precision.

Inventive Principle:

Principle #24Intermediary (Mediator)

Data Source

PatentUS9373681B2Method for fabricating capacitor of semiconductor device

Publication Date: 2016.06.21 SK HYNIX INC

AI summary

A method for fabricating a capacitor of a semiconductor device includes forming a mold layer over a substrate, forming a plurality of preliminary openings by selectively etching the mold layer, forming a plurality of openings where each opening is formed to have a given linewidth by forming a sacrificial layer on sidewalls of the preliminary openings, and forming a plurality of storage nodes in the plurality of openings.