Capacitor Sidewall Profile Control via Segmented Molding Layers
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Solution Overview
Problem
The patterning process for forming concave capacitors in semiconductor devices often results in errors such as deviations and size discrepancies between upper and lower holes, leading to sharp sidewalls that hinder the formation of the lower electrode close to the dielectric layer, limiting capacitance and device performance.
Innovation Solution
A method involving the formation of a first molding layer with a first hole, followed by a second molding layer that exposes the side surface of the first molding layer, allowing for the creation of a second hole with asymmetrical sidewalls that connect to the first hole, enabling the formation of a capacitor electrode with a dielectric layer and electrodes that conformally cover the sidewalls.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If a hole with great aspect ratio is formed to increase capacitance, then capacitance is improved, but patterning precision deteriorates due to alignment errors between upper and lower holes
Solution Approach 1:
The molding layer is divided into multiple segments (first molding layer, second molding layer, third molding layer) with different etch rates. Each segment can be independently patterned and etched, allowing the upper hole to be formed with better alignment precision while the cumulative depth achieves the required aspect ratio for high capacitance.
Solution Approach 2:
The etch rate parameter is varied across different molding layer segments. By controlling the etch rates of different layers, the etching process can be optimized for each segment, ensuring precise alignment for upper holes while maintaining the overall depth required for high capacitance performance.
2Ease of manufacture
If conventional single molding layer is used, then process simplicity is maintained, but electrode formation near dielectric layer is hindered due to sharp sidewalls and under-cut
Solution Approach 1:
The molding layer is segmented into multiple layers with different etch rates. This segmentation allows the etching process to create gentler sidewall profiles in the upper regions where electrodes will be formed, eliminating the sharp sidewalls and under-cut problems that prevent proper electrode formation near the dielectric layer.
Solution Approach 2:
Different regions of the molding structure have different etch rates tailored to their specific functions. The lower molding layers have higher etch rates for efficient depth achievement, while the upper molding layers have lower etch rates to create gentle sidewall profiles that facilitate electrode formation near the dielectric layer.
3Productivity
If etch rate is increased to improve productivity, then manufacturing speed is improved, but sidewall profile control deteriorates leading to sharp slopes and under-cut
Solution Approach 1:
The etching process is segmented into multiple stages corresponding to different molding layers. Each stage uses etch rates optimized for its specific purpose: higher etch rates for lower layers to achieve depth quickly (maintaining productivity), and lower etch rates for upper layers to create gentle sidewall profiles (maintaining shape control).
Solution Approach 2:
The etch rate parameter is changed across different molding layer segments. By adjusting etch rate parameters for each layer, the process achieves both high productivity (through efficient etching of lower layers) and good sidewall profile control (through slower etching of upper layers that form gentle slopes).
Data Source
AI summary
Methods of forming a semiconductor device can be provided by forming a first molding layer on a substrate and forming a first hole through the first molding layer. A second molding layer can be formed on the first molding layer so that the first hole is retained in the first molding layer and a second hole can be formed through the second molding layer to connect with the first hole. A capacitor electrode can be formed in the first and second holes.