Capacitor Sidewall Verticality via Silicon Non-Oxide Mold
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
The challenge in semiconductor device manufacturing is forming capacitors with high aspect ratios, as existing methods often fail to achieve vertical sidewalls, especially at high aspect ratios, which is crucial for maintaining high capacitance in compact devices.
Innovation Solution
A method involving the formation of a mold layer of silicon non-oxide on a substrate, followed by etching to create an opening with vertical sides, where a barrier layer is formed, and then the mold and barrier layers are removed, allowing for the sequential deposition of a dielectric and upper electrode layers on a lower electrode, ensuring vertical sidewalls and high capacitance.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Area of stationary object
If conventional etching methods are used to form openings in oxide mold layers, then the capacitor footprint can be reduced, but the sidewalls cannot achieve vertical orientation especially at high aspect ratios
Solution Approach 1:
The patent changes the material parameter of the mold layer from oxide to silicon non-oxide material, which fundamentally alters the etching characteristics and enables vertical sidewall formation. This material parameter change allows the etching process to produce the desired vertical profile that was unattainable with oxide materials.
Solution Approach 2:
The patent replaces the conventional oxide-based mold layer system with a silicon non-oxide-based system. This substitution changes the underlying material system and its interaction with etching processes, enabling the formation of vertical sidewalls through standard etching techniques that fail with oxide materials.
2Quantity of substance
If the aspect ratio of the capacitor is increased to maintain high capacitance in small footprint, then the capacitance density improves, but the difficulty of forming vertical sidewalls increases
Solution Approach 1:
By changing the mold layer material from oxide to silicon non-oxide, the patent enables vertical sidewall formation even at high aspect ratios. This material parameter change allows the capacitor structure to achieve high capacitance density through increased aspect ratio while maintaining manufacturable vertical sidewalls.
3Ease of manufacture
If a mold layer of oxide is used, then the fabrication process is conventional and well-established, but the opening cannot be formed with vertical sides
Solution Approach 1:
The patent changes the material composition parameter of the mold layer from oxide to silicon non-oxide material. This change maintains ease of manufacture through established semiconductor fabrication processes while fundamentally improving the sidewall shape to achieve vertical orientation.
Solution Approach 2:
The patent substitutes the oxide mold layer system with a silicon non-oxide mold layer system. This substitution replaces the conventional material system that produces slanted sidewalls with one that enables vertical sidewall formation, while still using standard fabrication techniques.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach enables the fabrication of capacitors with vertical sidewalls even at high aspect ratios, facilitating the formation of capacitors with high capacitance in a small footprint, enhancing the performance of semiconductor devices.
Implementation Method 1
the mold layer is etched to form an opening through the mold layer
Implementation Method 2
a barrier layer is formed along the sides of the opening
Implementation Method 3
a lower electrode is formed in the opening including over the barrier layer
Implementation Method 4
a dielectric layer and an upper electrode are sequentially formed on the lower electrode
Data Source
AI summary
A capacitor is fabricated by forming a mold layer of a silicon based material that is not an oxide of silicon, e.g., polysilicon or doped polysilicon, on a substrate, forming an opening through the mold layer, forming a barrier layer pattern along the sides of the opening, subsequently forming a lower electrode in the opening, then removing the mold layer and the barrier layer pattern, and finally sequentially forming dielectric layer and an upper electrode on the lower electrode.


