Terminal-to-Terminal Capacitor Stacks for High-Frequency Noise Filtering

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Solution Overview

Problem

Optical transceivers face challenges in reducing footprint and simplifying electrical interconnection for filtering circuitry due to space constraints, which complicates thermal management and RF signal quality, especially in high-speed applications like 400 Gb/s and beyond.

Innovation Solution

The use of capacitor stacks with capacitors mounted in a terminal-to-terminal orientation to reduce the overall footprint of bypass filtering circuits, allowing for direct electrical coupling and minimizing the need for wire bonds, thereby simplifying manufacturing and reducing trace layout complexity.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Area of stationary object

If traditional arrayed filtering capacitors are used, then filtering performance is achieved, but footprint area increases and electrical interconnection complexity increases

Engineering Contradiction:
Improvefootprint areaVSAvoidelectrical interconnection complexity
Core Design Contradiction:
Area of stationary objectVSDevice complexity

Solution Approach 1:

The patent transitions from a two-dimensional arrayed capacitor layout to a three-dimensional stacked configuration. Multiple capacitors are vertically stacked and interconnected through terminal-to-terminal mounting, utilizing the vertical dimension to reduce the horizontal footprint area while maintaining filtering performance.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

Solution Approach 2:

The patent merges multiple capacitors into a single stacked assembly where capacitors are directly coupled through their terminals. This consolidation reduces the overall footprint and simplifies electrical interconnection by eliminating the need for extensive trace routing and separate mounting locations for each capacitor.

Inventive Principle:
Principle #5Merging (Combining)

2Ease of manufacture

If filtering capacitors are arrayed on substrate, then noise filtering is provided, but trace routing complexity and manufacturing complexity increase

Engineering Contradiction:
Improvemanufacturing complexityVSAvoidtrace routing complexity
Core Design Contradiction:
Ease of manufactureVSDevice complexity

Solution Approach 1:

By stacking capacitors vertically and interconnecting them through terminal-to-terminal mounting, the patent eliminates the need for complex two-dimensional trace routing on the substrate. The vertical stacking approach simplifies the electrical interconnection path and reduces manufacturing complexity.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

Solution Approach 2:

The patent extracts the electrical interconnection function from the substrate trace routing by directly coupling capacitor terminals together. This separation of functions simplifies the substrate design and reduces trace routing complexity while maintaining the filtering functionality.

Inventive Principle:
Principle #2Taking out (Extraction)

3Reliability

If more filtering capacitors are used, then noise decoupling performance improves, but footprint area and assembly complexity increase

Engineering Contradiction:
Improvenoise decoupling performanceVSAvoidfootprint area
Core Design Contradiction:
ReliabilityVSArea of stationary object

Solution Approach 1:

The patent uses vertical stacking to accommodate multiple filtering capacitors in a compact footprint. By utilizing the vertical dimension, the design can include multiple capacitors for improved noise decoupling performance without proportionally increasing the horizontal footprint area.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

Solution Approach 2:

The patent nests multiple capacitors within a stacked configuration where smaller capacitors are positioned on top of larger ones. This nesting approach allows multiple capacitors to occupy overlapping horizontal space, reducing the overall footprint while maintaining the ability to filter multiple frequency ranges.

Inventive Principle:
Principle #7Nested doll (Nesting)

Data Source

PatentUS11404210B2Capacitor stacks for noise filtering in high-frequency switching applications and an optical subassembly module implementing same
Publication Date: 2022.08.02 APPLIED OPTOELECTRONICS INC(US)
  • US11404210B2 patent drawing
  • US11404210B2 patent drawing
  • US11404210B2 patent drawing

AI summary

The present disclosure is generally directed to utilizing capacitors stacks with capacitors mounted in a terminal-to-terminal mounting orientation to reduce overall footprint of capacitor arrays for bypass filtering circuits. In an embodiment, each capacitor stack includes at least a first capacitor, a second capacitor, and a ground plane interconnect. The first capacitor includes first and second terminals disposed opposite each other. The first terminal provides a mating surface to couple to the second capacitor, the second terminal couples to a ground plane. The second capacitor includes first and second terminals disposed opposite each other. The first terminal provides a mounting surface to electrically couple to and support the first capacitor, and the second terminal provides a mating surface to electrically and physically couple to the ground plane. Accordingly, the first capacitor can be inverted and mounted atop the second capacitor to eliminate the necessity of wire bonds, for example.