Semiconductor Capacitor Storage Node Plug Recessing and Barrier Metal
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Solution Overview
Problem
Conventional methods for forming MIM capacitors in semiconductor devices result in crevasses on the side walls of storage node plugs during etching, leading to current leakage and structural defects due to inadequate step coverage of metal layers, which can cause capacitor failure and reduce wafer yield.
Innovation Solution
A method involving the formation of a first insulation layer, an etch stop layer, and a second insulation layer, followed by selective etching to create a hole, recessing the storage node plug, forming a barrier metal layer, and depositing a TiN layer to connect the storage node plug, and finally forming a dielectric and metal layer for the plate electrode, using specific etching and deposition processes to prevent crevasse formation and enhance step coverage.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If a metal layer is deposited to form a storage node electrode in a MIM capacitor, then the electrode structure is formed, but crevasses form on the side walls due to inadequate step coverage, leading to current leakage and structural defects
Solution Approach 1:
A barrier metal layer (TiN or TaN) is introduced as an intermediary between the storage node plug and the plate electrode. This barrier metal layer provides excellent step coverage on the crevassed side walls, preventing current leakage while maintaining the structural integrity of the capacitor. The barrier metal layer acts as a mediator that bridges the gap between the plug and electrode, ensuring reliable electrical connection without requiring perfect step coverage from the main metal layer.
Solution Approach 2:
The capacitor structure employs composite materials including the barrier metal layer (TiN or TaN) combined with the main metal layer (TiN). This composite structure leverages the superior step coverage properties of the barrier metal to compensate for the inadequate step coverage in the main metal layer, thereby preventing crevasse-related defects and current leakage while maintaining overall device performance.
2Ease of manufacture
If the storage node plug is exposed during hole formation, then the hole is created for electrode connection, but the exposed plug surface creates crevasses that compromise structural stability
Solution Approach 1:
The barrier metal layer is deposited in advance on the storage node plug surface before the main metal layer formation. This preliminary action ensures that the plug surface is pre-coated with a material that provides excellent step coverage, preventing crevasse formation during subsequent processing steps. The barrier metal layer is prepared beforehand to protect the plug structure from the harmful effects of inadequate step coverage.
Solution Approach 2:
The barrier metal layer serves as a protective cushion deposited beforehand on the storage node plug. This layer cushions the plug against the formation of crevasses by providing a continuous, adherent coating that prevents the main metal layer from directly contacting and exacerbating the crevassed surface. The barrier metal layer absorbs the mechanical and electrical stress that would otherwise compromise the structural stability of the exposed plug.
3Productivity
If a simple metal deposition process is used, then the process is simple and fast, but the metal layer does not adequately cover the crevassed surfaces, causing capacitor failure
Solution Approach 1:
The deposition process is segmented into two distinct stages: first depositing the barrier metal layer (TiN or TaN) with excellent step coverage properties, and then depositing the main metal layer (TiN). This segmentation allows each layer to perform its specific function - the barrier metal ensures complete coverage of crevassed surfaces, while the main metal provides the primary electrical connection. The segmented approach maintains high productivity by using standard deposition techniques for each layer while achieving superior overall coverage quality.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach effectively prevents current leakage by protecting the storage node plug and improving the step coverage of metal layers, resulting in a stable device and increased wafer yield by eliminating crevasse-related defects.
Implementation Method 1
a TiSix layer 15 is formed by proceeding an annealing step. Here, the TiSix layer 15 is formed by the reaction of the Ti layer with silicon within the storage node plug 7
Implementation Method 2
the TiN layer (not shown) for the storage node electrode is deposited on the overall surface of the substrate having the TiSix layer 15, and then a storage node electrode S1 of the capacitor electrically connected to the storage node plug 7 through the TiSix layer 15 is formed by etchback the TiN layer
Data Source
AI summary
A method for forming a capacitor of a semiconductor device includes forming a first insulation layer having a storage node plug on a semiconductor substrate; forming an etch stop layer and a second insulation layer sequentially on the substrate having the first insulation layer; forming a hole exposing a portion of the storage node plug by selectively etching the second insulation layer by using the etch stop layer; recessing a portion of the storage node plug exposed by the hole; forming a barrier metal layer on a surface of the recessed storage node plug; forming a storage node electrode connected to the storage node plug through the barrier metal layer in the hole; and forming a dielectric layer and a metal layer for a plate electrode sequentially on the storage node electrode.