Capacitor Strap Connection Structure for DRAM Yield
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Solution Overview
Problem
In semiconductor fabrication, particularly for DRAM devices, increased circuit density leads to manufacturing challenges such as shorting between deep trench capacitors due to epitaxial material merging, which affects product yield and device performance.
Innovation Solution
A semiconductor structure with a conductor region having a reduced diameter top portion, featuring an annular spacer and a fin portion, is formed to increase spacing between capacitors, and silicide or polysilicon is deposited to complete connections between capacitors and transistors, reducing the risk of shorts.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If circuit density is increased to accommodate more memory on devices, then memory capacity is improved, but manufacturing challenges arise that adversely impact product yield
Solution Approach 1:
The capacitor structure is segmented into distinct regions: a lower conductor region within the trench and an upper conductor region separated by a dielectric layer. This segmentation prevents epitaxial material from merging between adjacent capacitors during manufacturing, thereby maintaining product yield while enabling increased circuit density
Solution Approach 2:
The patent introduces a vertical dimension to the capacitor structure by stacking conductor regions and dielectric layers in the depth direction. This three-dimensional configuration increases spacing between capacitors in the horizontal plane, reducing shorting risks and improving manufacturing reliability while accommodating higher memory capacity
2Quantity of substance
If circuit density is increased, then more memory can fit in an integrated circuit package, but shorting between deep trench capacitors occurs due to epitaxial material merging
Solution Approach 1:
A dielectric layer is introduced as an intermediary between the lower conductor region and the upper conductor region. This dielectric barrier prevents epitaxial material from bridging adjacent capacitor structures during the manufacturing process, eliminating the harmful shorting effect while allowing higher circuit density
Solution Approach 2:
The dielectric layer is formed between conductor regions before the epitaxial growth step. This preliminary action establishes a protective barrier in advance, preventing epitaxial material merging before it can occur and thereby preventing shorting between capacitors
Data Source
AI summary
Structures and methods for deep trench capacitor connections are disclosed. The structure includes a reduced diameter top portion of the capacitor conductor. This increases the effective spacing between neighboring deep trench capacitors. Silicide or additional polysilicon are then deposited to complete the connection between the deep trench capacitor and a neighboring transistor.