Display Device Capacitor Structure for Stable Gate Voltage
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Solution Overview
Problem
In organic EL display devices, the variation in electric capacitance of P-type capacitors due to manufacturing variations leads to unstable voltage at the gate electrode of the drive transistor, causing display unevenness.
Innovation Solution
A display device with a thin film transistor layer comprising alternating layers of polysilicon and oxide semiconductor materials, where P-type and N-type capacitors are strategically positioned to stabilize the gate voltage by minimizing capacitance variations.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a P-type capacitor is formed using a scanning signal line and metal layer overlapping, then the voltage at the gate electrode of the drive transistor can be raised, but variations in electric capacitance occur due to manufacturing variations, resulting in unstable voltage and display unevenness
Solution Approach 1:
The patent changes the material parameter of the capacitor electrode from conventional metal to oxide semiconductor, which fundamentally alters the capacitance characteristics. This material substitution reduces sensitivity to dimensional variations in the overlapping structure, thereby suppressing capacitance variations caused by manufacturing tolerances while maintaining the voltage-raising function
Solution Approach 2:
The patent applies different material qualities to different parts of the capacitor structure. Specifically, the electrode is made of oxide semiconductor with specific electrical properties, while the insulating film uses appropriate dielectric materials. This localized optimization of material properties ensures stable capacitance characteristics in the critical electrode region, reducing the impact of manufacturing variations
2Reliability
If an N-channel type threshold voltage compensation transistor using oxide semiconductor is used, then the transistor can be formed with low leakage current, but the gate electrode voltage is pulled to negative side due to feed-through and N-type capacitor effects, making it difficult to produce black potential
Solution Approach 1:
The patent converts the harmful voltage pull-down effect into a beneficial feature by strategically using the N-type capacitor effect. The P-type capacitor formed by the scanning signal line and oxide semiconductor electrode generates a positive voltage effect that counterbalances the negative pull-down from the N-channel transistor, transforming the harmful interaction into a useful voltage compensation mechanism
Solution Approach 2:
The patent introduces a counterbalancing mechanism where the P-type capacitor effect acts as an anti-weight to the N-type capacitor's voltage pull-down effect. By carefully designing the oxide semiconductor electrode structure and its overlap with the scanning signal line, the positive voltage contribution from the P-type capacitor compensates for the negative voltage pull-down, enabling stable black potential generation
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
Stabilizes the gate voltage of the drive transistor, reducing display unevenness by suppressing variations in electric capacitance.
Implementation Method 1
a first wiring line formed of the second semiconductor film... the first wiring line covers the third wiring line at least above the first scanning signal line
Data Source
AI summary
An initialization transistor and a threshold voltage compensation transistor are connected via a first wiring line, a gate electrode of a drive transistor is connected to the first wiring line via a second wiring line, and in each subpixel, a first scanning signal line of a gate electrode of a write control transistor, a second scanning signal line of a gate electrode of the threshold voltage compensation transistor, and the second scanning signal line of a gate electrode of the initialization transistor are provided so as to extend parallel to each other, a third wiring line is connected to the second wiring line, and the first wiring line is provided so as to cover the third wiring line above the first scanning signal line.