Double-Sided Capacitor Support Layers for Deep DRAM Stability

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Solution Overview

Problem

The stability of double-sided capacitors in DRAMs is compromised due to the increased depth-to-width ratio, leading to peeling or bending issues during fabrication, which decreases the yield and performance of dynamic random access memory.

Innovation Solution

A fabrication method involving a substrate with a capacitor contact pad, a stack structure of alternately stacked sacrificial and supporting layers, an auxiliary layer on the capacitor hole sidewall, and subsequent removal of sacrificial layers to create a gap between supporting layers, filled with a dielectric layer, enhancing the structural integrity and stability of the capacitor.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Duration of action of moving object

If the depth-to-width ratio of the capacitor is continuously increased to maintain data longer, then the data retention time is improved, but the capacitor structure becomes unstable and prone to peeling or bending

Engineering Contradiction:
Improvedata retention timeVSAvoidcapacitor structure stability
Core Design Contradiction:
Duration of action of moving objectVSStability of the object's composition

Solution Approach 1:

The capacitor structure is divided into multiple supporting layers (first supporting layer, second supporting layer, third supporting layer) stacked at different heights. Each supporting layer provides localized support to different sections of the deep capacitor hole, preventing peeling and bending while maintaining the increased depth-to-width ratio needed for longer data retention.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The solution transitions from a single-plane support structure to a three-dimensional multi-layer support system. Supporting layers are positioned at different vertical heights within the capacitor hole, creating a spatial distribution of support points that stabilizes the deep capacitor structure without reducing its depth-to-width ratio.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

2Reliability

If the depth-to-width ratio of the capacitor is continuously increased to improve performance, then the capacitance value is improved, but the fabrication yield decreases due to peeling or bending

Engineering Contradiction:
Improvecapacitor performanceVSAvoidDRAM fabrication yield
Core Design Contradiction:
ReliabilityVSProductivity

Solution Approach 1:

The capacitor structure is segmented into multiple supporting layers positioned at different heights, providing distributed support that prevents structural failures during fabrication. This segmentation allows the capacitor to maintain high depth-to-width ratio for improved performance while reducing peeling and bending defects that会降低 yield.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

Different supporting layers are positioned at specific heights within the capacitor hole to provide localized support where needed. The first supporting layer is at a first height, the second supporting layer is at a second height different from the first, allowing targeted stabilization of different sections of the deep capacitor structure during fabrication processes.

Inventive Principle:
Principle #3Local quality

Data Source

PatentUS11894419B2Double-sided capacitor and fabrication method thereof
Publication Date: 2024.02.06 CHANGXIN MEMORY TECH INC
  • US11894419B2 patent drawing
  • US11894419B2 patent drawing
  • US11894419B2 patent drawing

AI summary

The present application relates to a fabrication method for a double-sided capacitor. The fabrication method for the double-sided capacitor includes the following steps: providing a substrate; forming a stack structure on the substrate; forming a capacitor hole in a direction perpendicular to the substrate to penetrate the stack structure, wherein the stack structure includes sacrificial layers and supporting layers alternately stacked; forming an auxiliary layer to cover the sidewall of the capacitor hole; forming a first electrode layer to cover the surface of the auxiliary layer; removing a part of the supporting layer on the top of the stack structure; removing the sacrificial layers and the auxiliary layer simultaneously along the opening; and forming a dielectric layer covering the surface of the first electrode layer and a second electrode layer covering the surface of the dielectric layer, wherein the gap is at least filled with the dielectric layer.