Capacitor-Switched Phase Interpolator for High-Bandwidth Modulation
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Solution Overview
Problem
Current digital-to-time converters face inefficiencies in power usage and bandwidth limitations, particularly in high-bandwidth applications like LTE, where polar mode struggles to modulate phase information effectively.
Innovation Solution
A phase interpolator and digital-to-time converter system that uses a plurality of capacitors to switch between clock and phase-shifted clock signals, providing an interpolated modulated phase information signal, which is then low-pass filtered to achieve efficient phase modulation, thereby improving noise performance and handling high bandwidths.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Use of energy by moving object
If polar mode is used for phase modulation in digital-to-time converters, then power efficiency is improved, but bandwidth capability deteriorates when baseband signal bandwidth exceeds 40 MHz
Solution Approach 1:
The phase modulation function is segmented between the PLL (handling coarse phase adjustment) and the phase interpolator (handling fine phase adjustment). This segmentation allows the system to achieve both power efficiency and high bandwidth capability by dividing the modulation task across two specialized components.
Solution Approach 2:
The phase interpolator acts as an intermediary component between the PLL output and the RFDAC. It takes the phase-modulated signal from the PLL and further refines the phase adjustment, enabling the system to handle high bandwidth signals while maintaining power efficiency.
2Adaptability or versatility
If IQ mode is used for phase modulation, then bandwidth capability is maintained, but power efficiency deteriorates due to loss of square root of two when summing orthogonal vectors
Solution Approach 1:
The phase interpolator serves as an intermediary that processes the phase-modulated signal after the PLL, enabling fine phase adjustment without requiring the inefficient orthogonal vector summation method used in IQ mode. This intermediary component recovers power efficiency while maintaining bandwidth capability.
3Use of energy by moving object
If a PLL is used for phase modulation, then power efficiency is improved, but modulation capability deteriorates for high bandwidth signals
Solution Approach 1:
The modulation capability is segmented between the PLL (providing coarse phase modulation) and the phase interpolator (providing fine phase interpolation). This segmentation enables the system to achieve both power efficiency from the PLL and high-frequency modulation capability through the phase interpolator's switching mechanism.
Solution Approach 2:
The phase interpolator dynamically switches between different capacitor configurations based on the modulation signal, enabling fast phase adjustment that complements the PLL's slower but more power-efficient operation. This dynamic switching restores modulation capability for high bandwidth applications.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The solution enhances noise performance and enables efficient phase modulation across high bandwidths, addressing the inefficiencies and limitations of existing converters by effectively interpolating and filtering phase information.
Implementation Method 1
The phase interpolator comprises a plurality of capacitors, a first input for a clock signal, a second input for a phase shift clock signal and an output. The phase interpolator is configured to provide an interpolated, modulated phase information signal by switching, dependent on a modulation information, a first number of the capacitors between the first input and the output and a second number of the capacitors between the second input and the output.
Implementation Method 2
The low pass filter is configured to low-pass filter the interpolated, modulated phase information signal in order to obtain a modulated phase signal.
Data Source
AI summary
A phase interpolator is provided. The phase interpolator includes a plurality of capacitors, a first input for a clock signal, a second input for a phase shift clock signal and an output. The phase interpolator is configured to provide an interpolated, modulated phase information signal by switching, dependent on a modulation information, a first number of the capacitors between the first input and the output and a second number of the capacitors between the second input and the output.