High-Aspect-Ratio Capacitor Trenches With Bottom-Widening Etching
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Solution Overview
Problem
Conventional semiconductor structures face performance issues due to gradually narrowed trench line widths during high-aspect-ratio etching, leading to reduced average line width, cross-sectional area, and perimeter, which can affect the performance of semiconductor structures such as capacitors.
Innovation Solution
The method involves performing an isotropic etching process on a dielectric layer after forming a first groove, resulting in a second groove with a greater maximum width than the bottom width of the first groove, thereby increasing the average line width and cross-sectional area without changing the opening width, and including a support layer to prevent corrosion and ensure structural stability.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Length of stationary object
If conventional etching is used to form high aspect ratio trenches, then the trench depth can be achieved, but the trench line width gradually narrows during the etching process
Solution Approach 1:
The etching process is divided into multiple stages: a first etching process to form an initial trench structure, followed by a second etching process to widen the trench bottom, and finally a third etching process to complete the high aspect ratio trench. This segmentation allows different portions of the trench to be formed with different width characteristics, preventing gradual narrowing throughout the entire depth.
Solution Approach 2:
A mandrel structure is formed at the bottom of the trench before the main etching process. This mandrel serves as a preliminary structure that maintains the trench line width at the bottom during subsequent etching operations, preventing the gradual narrowing that would otherwise occur in high aspect ratio trenches.
2Area of moving object
If the trench line width is maintained throughout etching, then the average line width and cross-sectional area are improved, but the etching process duration increases
Solution Approach 1:
The mandrel structure is formed with dimensions that are larger than the final desired trench bottom width, providing excessive material that prevents narrowing during etching. This partial over-formation allows the trench to maintain its width throughout the etching process without requiring excessively long processing times, as the mandrel provides structural support during the critical etching phases.
3Area of moving object
If the opening width of the trench is increased to maintain average line width, then the cross-sectional area improves, but the adjacent structures are damaged
Solution Approach 1:
The trench width is made non-uniform along its depth, with the bottom portion being wider than the top portion. This local variation in width compensates for the narrow opening width, maintaining the required average line width and cross-sectional area without increasing the opening width that would damage adjacent structures. The wider bottom section provides the necessary area while the narrow top section avoids harming neighboring features.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach enhances the performance parameters of semiconductor structures by increasing the average line width, cross-sectional area, and perimeter of the grooves, improving capacitance and structural stability while minimizing damage to adjacent structures and shortening the etching process.
Implementation Method 1
performing an isotropic etching process on the dielectric layer located at the bottom of the first groove to form a second groove
Data Source
AI summary
Embodiments of the present application provide a semiconductor structure and its manufacturing method. The method for manufacturing a semiconductor structure includes: providing a substrate and a dielectric layer located on the substrate, the substrate being provided therein with a conductive structure; etching a certain thickness of the dielectric layer to form a first groove; performing an isotropic etching process on the dielectric layer located at the bottom of the first groove to form a second groove, a maximum width of the second groove being greater than a bottom width of the first groove in a direction parallel with a surface of the substrate; and etching the dielectric layer located at the bottom of the second groove to form a third groove exposing the conductive structure.