Capacitor Structure With Zigzagging Electrodes For High Density

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Solution Overview

Problem

Conventional metal-oxide-metal (MOM) capacitor structures face challenges in increasing capacitance per unit area due to difficulties in controlling the uniformity and stability of the insulating medium layer, especially as semiconductor integration increases and miniaturization demands higher capacitance.

Innovation Solution

A capacitor structure featuring a dielectric material layer with zigzagging electrodes and finger-shaped electrodes, where the zigzagging electrodes form concave parts for extension parts of adjacent finger-shaped electrodes, allowing for increased surface area and electrical connections between metal layers, thereby enhancing capacitance.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Quantity of substance

If the thickness of the insulating medium is reduced to increase capacitance, then capacitance increases, but manufacturing precision and stability deteriorate

Engineering Contradiction:
ImprovecapacitanceVSAvoiduniformity of insulating medium layer
Core Design Contradiction:
Quantity of substanceVSManufacturing precision

Solution Approach 1:

The patent transitions from a conventional planar electrode structure to a three-dimensional folded electrode structure. The electrode is folded back and forth within the insulating medium, creating multiple surfaces that contact the dielectric material. This dimensional transformation allows the electrode to achieve much larger effective surface area within the same planar footprint, thereby increasing capacitance without requiring reduction of the insulating medium thickness.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

2Quantity of substance

If the surface area of electrodes is increased using multi-layer capacitor structure, then capacitance increases, but device complexity and manufacturing difficulty increase

Engineering Contradiction:
ImprovecapacitanceVSAvoidcomplicated fabrication steps
Core Design Contradiction:
Quantity of substanceVSDevice complexity

Solution Approach 1:

The electrode is divided into multiple segments that are folded back and forth, creating a series of parallel plates within the single layer. Each fold creates additional electrode surfaces that contact the insulating medium, effectively segmenting the electrode to maximize surface area exposure while maintaining a single-layer structure that simplifies fabrication.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The electrode employs a folded or curved geometry rather than a flat planar structure. The folding creates multiple surfaces that contact the insulating medium, transforming a two-dimensional planar electrode into a three-dimensional structure with increased surface area, similar to how curved surfaces provide more area than flat surfaces in spherical geometries.

Inventive Principle:
Principle #14Spheroidality (Curvature)

3Productivity

If semiconductor integration is increased for miniaturization, then device density increases, but capacitance per unit area decreases

Engineering Contradiction:
Improveintegration densityVSAvoidcapacitance per unit area
Core Design Contradiction:
ProductivityVSQuantity of substance

Solution Approach 1:

The folded electrode structure exploits the third dimension (vertical folding within the plane) to increase effective electrode surface area. This allows the capacitor to maintain high capacitance per unit area even as overall device dimensions are reduced for higher integration density, effectively decoupling miniaturization from capacitance loss.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This design significantly increases capacitance per unit area and optimizes total capacitance, reducing area costs in integrated circuit layouts while maintaining fabrication stability and uniformity.

Implementation Method 1

The two metal layers are disposed at intervals in the dielectric material layer. Each of the metal layers includes a zigzaging electrode, a first finger-shaped electrode, and a second finger-shaped electrode.

Methodology Applied
Scientific EffectCapacitance: Capacitance

Data Source

PatentUS8582276B2Capacitor structure
Publication Date: 2013.11.12 VIA LABS INC
  • US8582276B2 patent drawing
  • US8582276B2 patent drawing
  • US8582276B2 patent drawing

AI summary

A capacitor structure including a dielectric material layer and at least two metal layers is provided. The metal layers are disposed at intervals in the dielectric material layer. Each of the metal layers includes a zigzaging electrode, a first finger-shaped electrode and a second finger-shaped electrode. The zigzaging electrode forms a plurality of first concave parts disposed at one side of the zigzaging electrode and a plurality of second concave parts disposed at the other side of the zigzaging electrode. The first finger-shaped electrode includes a plurality of first extension parts. The first extension parts are respectively disposed in the first concave parts. The second finger-shaped electrode includes a plurality of second extension parts. The second extension parts are respectively disposed in the second concave parts. The zigzaging electrode in each of the metal layers is electrically coupled to the first and second finger-shaped electrodes of adjacent metal layers.