Capacitorless One-Transistor Memory Cell Fabrication
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Solution Overview
Problem
The integration of three-dimensional cell capacitors in DRAM devices is limited, leading to challenges in data storage and operating characteristics, necessitating the development of capacitorless one-transistor memory cells with improved data retention and performance.
Innovation Solution
A method of fabricating a semiconductor device with a capacitorless one-transistor memory cell, involving the formation of floating body patterns, gate patterns, and isolation layers, where the first floating body pattern is partially etched to create a protrusion portion and recessed regions, and impurity regions are formed to enhance charge storage and reduce gate capacitance.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If a three-dimensional cell capacitor is used in DRAM devices, then data storage capability is improved, but device complexity and manufacturing difficulty increase
Solution Approach 1:
The invention extracts and removes the cell capacitor component from the DRAM structure, transitioning from a two-transistor one-capacitor (2T1C) or one-transistor one-capacitor (1T1C) architecture to a capacitorless one-transistor (1T0C) memory cell. The floating body pattern serves as the charge storage element, eliminating the need for a separate three-dimensional cell capacitor and its associated complex fabrication processes.
Solution Approach 2:
The invention replaces the durable but complex three-dimensional cell capacitor with a simpler floating body structure that can be formed through standard semiconductor fabrication processes. The floating body is created through selective epitaxial growth and etching, using temporary structures that are later removed, resulting in a simpler final device architecture.
2Reliability
If a three-dimensional cell capacitor is used in DRAM devices, then data retention is improved, but ease of manufacture deteriorates
Solution Approach 1:
The invention removes the three-dimensional cell capacitor structure and its associated complex manufacturing steps, including capacitor formation, tunnel oxide growth, and charge trap layer deposition. Instead, data retention is achieved through the floating body structure formed by selective epitaxial growth and etching, which can be integrated into standard CMOS fabrication processes.
Solution Approach 2:
The invention replaces the physical three-dimensional capacitor structure with an electrical field-based floating body charge storage mechanism. The floating body stores charge through electrostatic field effects rather than physical charge trapping in a separate capacitor structure, simplifying the manufacturing process while maintaining data retention capability.
3Quantity of substance
If the first floating body pattern is partially etched to create protrusion portions, then charge storage capability is improved, but manufacturing precision requirements increase
Solution Approach 1:
The invention performs preliminary actions by forming the complete floating body pattern first through selective epitaxial growth, then uses controlled etching to create the protrusion portions. The etching process is designed to remove specific portions of the floating body while leaving the charge storage regions intact, with the protrusion portions serving as charge storage elements that enhance data retention without requiring extremely precise single-step etching.
Data Source
AI summary
A method of fabricating a semiconductor device having a capacitorless one-transistor memory cell includes forming a first floating body pattern on a lower insulating layer of a substrate and a first gate pattern crossing over the first floating body pattern and covering sidewalls of the first floating body pattern is formed. The first floating body pattern at both sides of the first gate pattern is partially etched to form a protrusion portion extending between and above the partially etched regions, and first impurity regions are formed in the partially etched regions of the first floating body pattern.