Capless LDO Regulator Fast Overvoltage Response
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Solution Overview
Problem
Capless LDO voltage regulators face issues with rapid load current changes, leading to output voltage instability and potential damage to low voltage load circuits due to limited on-chip capacitance and slow loop response, causing the output voltage to jump to the supply voltage and take a long time to recover.
Innovation Solution
A combination of fast and slow discharger circuits is used to quickly stabilize the output voltage, featuring a fast discharger circuit with a discharge transistor and trigger circuit to address abrupt overvoltage conditions and a slow discharger circuit with an unbalanced voltage comparator to handle less-abrupt conditions, ensuring low power consumption and high speed operation.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Use of energy by moving object
If capless LDO voltage regulator is used to save PCB area and reduce quiescent current, then battery life is extended and PCB area is saved, but output voltage stability deteriorates during rapid load current changes
Solution Approach 1:
The patent implements a preliminary action by detecting the rate of change of load current before the output voltage can jump to supply voltage. The detection circuit monitors dIload/dt and triggers the discharge transistor in advance to counteract the voltage jump, preventing the instability condition rather than reacting to it after occurrence.
Solution Approach 2:
The patent introduces an intermediary discharge transistor connected between the output node and ground. This intermediary component acts as a mediator that can rapidly discharge excess voltage when load current changes abruptly, thereby protecting the output voltage from jumping to supply voltage while maintaining the capless architecture's low quiescent current advantage.
2Area of stationary object
If on-chip output capacitance is minimized for capless design, then PCB area and power consumption are reduced, but loop response speed deteriorates
Solution Approach 1:
The patent replaces the traditional capacitor-based voltage stabilization mechanism with an active electronic control system. Instead of relying on passive RC time constants determined by physical capacitor size, the invention uses an active discharge transistor controlled by a detection circuit that senses load current changes and actively manages output voltage, enabling fast response without requiring large on-chip capacitance.
Solution Approach 2:
The patent implements dynamics by making the discharge transistor's operation conditional and adaptive. The transistor is activated only when the detection circuit senses rapid load current changes (dIload/dt > threshold), allowing the system to dynamically adjust its behavior based on operating conditions. This enables fast response during transients while maintaining low quiescent current during steady-state operation.
3Stability of the object's composition
If discharge transistor is activated to pull down output voltage during overvoltage, then output voltage stability is improved, but power consumption increases
Solution Approach 1:
The patent implements periodic action by activating the discharge transistor only during specific transient conditions when load current changes rapidly. The detection circuit monitors dIload/dt and triggers the discharge transistor temporarily during these events, then deactivates it during steady-state operation. This periodic, event-driven activation maintains voltage stability when needed while minimizing power consumption during normal operation.
Solution Approach 2:
The patent applies parameter changes by using the detection circuit to monitor the rate of change of load current (dIload/dt) and adjusting the discharge transistor's activation state based on this parameter. When dIload/dt exceeds a threshold indicating a rapid load change, the discharge transistor is activated; otherwise, it remains off. This parameter-based control ensures stability during transients while minimizing unnecessary power consumption.
Data Source
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AI summary
A voltage regulator is provided having one or more discharger circuits that compensate for low on-chip output capacitance and a slow loop response time. In one embodiment, the voltage regulator includes an output transistor coupled to an output voltage line, an output voltage sensing arrangement coupled to the output voltage line for producing an output feedback voltage, and an error amplifier coupled to the output feedback voltage, the output transistor, and a reference voltage for applying feedback control to the output transistor. A first discharger circuit is coupled to the output voltage line and to a reference potential, the first discharger circuit being triggered by a steep-rise overvoltage condition. In another embodiment, a combination of fast and slow discharger circuits is used to improve the load step response - i.e., to stop the output voltage from jumping too high and to pull it back to stable value very quickly, such that the load circuits are protected.