Capless LDO Circuit With Peak-Dip Suppression for Load Transients
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Solution Overview
Problem
There is a need for compact capless low dropout (LDO) voltage regulator circuits with improved efficiency and minimized load transient for modern digital circuits, as conventional LDO voltage regulators face challenges in maintaining output voltage stability under varying load conditions.
Innovation Solution
An electronic circuit comprising a low-dropout voltage regulator function block with a transconductance stage, buffer stage, and NMOS output stage, along with an output voltage stabilizer block connected outside the primary feedback loop, featuring peak and dip voltage suppression circuits to independently regulate voltage and minimize transient responses.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If conventional LDO voltage regulator circuits are used, then voltage regulation is provided, but output voltage stability deteriorates under varying load conditions
Solution Approach 1:
The voltage regulator is divided into two independent functional blocks: an LDO voltage regulator function block and an output voltage stabilizer block. Each block handles specific aspects of voltage regulation independently, allowing the system to maintain stability across varying load conditions without compromising overall performance.
Solution Approach 2:
The output voltage stabilizer block acts as an intermediary component connected between the LDO voltage regulator and the load. It suppresses voltage peaks and dips before they reach the output, thereby improving output voltage stability under varying load conditions while maintaining the functionality of the original LDO regulator.
2Reliability
If multiple feedback loops are used to improve voltage stability, then output voltage stability is improved, but device complexity increases
Solution Approach 1:
Instead of using multiple feedback loops within a single complex circuit, the invention segments the regulation function into two separate blocks: the LDO voltage regulator with its feedback loop, and the output voltage stabilizer with peak and dip suppression circuits. This segmentation achieves enhanced stability while keeping each block's internal complexity manageable.
Solution Approach 2:
The peak and dip suppression functionality is extracted from the main LDO regulator feedback system and implemented as a separate output voltage stabilizer block. This extraction simplifies the main regulator's feedback loop while adding targeted stabilization capabilities through the separate block, reducing overall circuit complexity compared to integrating multiple feedback loops.
3Reliability
If voltage regulation circuitry is added to improve load transient response, then load transient performance is improved, but power consumption increases
Solution Approach 1:
The output voltage stabilizer block operates selectively to suppress voltage peaks and dips during load transient conditions rather than continuously regulating. This periodic or event-driven operation improves load transient response while minimizing additional power consumption during steady-state operation.
Solution Approach 2:
The output voltage stabilizer block is designed to automatically detect and suppress voltage anomalies (peaks and dips) at the output without requiring additional control signals or increasing the bias current of the main LDO regulator. This self-service mechanism improves transient response while keeping power consumption minimal.
Data Source
AI summary
An electronic circuit for voltage regulation is disclosed, the circuit generally includes a low-dropout (LDO) voltage regulator function block, including a primary feedback loop, and an output voltage stabilizer block connected to the LDO voltage regulator function block outside the primary feedback loop, wherein the output voltage stabilizer block includes a plurality of peak voltage suppression circuits and a plurality of dip voltage suppression circuits. In some embodiments, the output voltage stabilizer block is set at low bias current to minimize current consumption at normal condition. Other useful features and advantages of an electronic circuit for voltage regulation are disclosed.