Capless Voltage Regulator Fast Loop for Transient Response

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Solution Overview

Problem

Capless voltage regulators suffer from poor transient performance due to the lack of an external capacitor, leading to significant output voltage changes and slow recovery during transient conditions.

Innovation Solution

A capless voltage regulator design incorporating an amplifier, capacitor, diode circuitry, and fast loop circuitry to enhance transient response, including undershoot detection and self-biased inverter circuitry to quickly mitigate voltage dips.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If an external capacitor is used in voltage regulator, then transient performance is improved, but device area and complexity increase

Engineering Contradiction:
Improvetransient performanceVSAvoidcircuit complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent merges the functions of the external capacitor with internal circuit elements by integrating a capacitor within the regulator circuit and using the amplifier's output terminal to charge/discharge it. This combines the transient response function with the existing control circuitry, eliminating the need for a separate external capacitor while maintaining transient performance.

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The patent introduces an intermediary mechanism through the amplifier and fast loop circuitry that mediates between the supply voltage and output. The amplifier detects output voltage changes and rapidly adjusts the pass transistor to compensate for transient load changes, acting as an intermediary that provides fast transient response without requiring external passive components.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Reliability

If an external capacitor is used in voltage regulator, then transient performance is improved, but manufacturing cost increases

Engineering Contradiction:
Improvetransient performanceVSAvoidmanufacturing cost
Core Design Contradiction:
ReliabilityVSEase of manufacture

Solution Approach 1:

The patent merges the capacitor function with internal circuit elements, reducing the component count and simplifying the bill of materials. By integrating the capacitor within the regulator and eliminating the external capacitor requirement, manufacturing cost is reduced while maintaining transient performance.

Inventive Principle:
Principle #5Merging (Combining)

3Area of stationary object

If capless voltage regulator design is used, then device area is reduced, but transient performance deteriorates

Engineering Contradiction:
Improvedevice areaVSAvoidtransient performance
Core Design Contradiction:
Area of stationary objectVSReliability

Solution Approach 1:

The patent implements a dynamic response mechanism through the fast loop circuitry and amplifier that actively adjusts circuit parameters in real-time during transient conditions. The amplifier rapidly detects voltage changes and modulates the pass transistor to compensate for transient load changes, providing dynamic transient performance without requiring large external capacitors.

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The patent employs feedback through the amplifier that continuously monitors the output voltage and rapidly adjusts the control signal to the pass transistor. This feedback mechanism enables the capless regulator to detect and correct transient voltage changes quickly, maintaining transient performance without external capacitors.

Inventive Principle:
Principle #23Feedback

Data Source

PatentUS20250355453A1Voltage regulator
Publication Date: 2025.11.20 TEXAS INSTRUMENTS INC
  • US20250355453A1 patent drawing
  • US20250355453A1 patent drawing
  • US20250355453A1 patent drawing

AI summary

Methods, apparatus, systems, and articles of manufacture are disclosed corresponding to a voltage regulator. An example circuit includes an output terminal; a first transistor including a current terminal and a control terminal coupled to an output terminal; a second transistor including a control terminal and a current terminal coupled to the control terminal of the first transistor; a third transistor including a first current terminal and a second current terminal, the first current terminal of the third transistor coupled to the output terminal; current mirror circuitry including a terminal coupled to the second current terminal of the third transistor; and inverter circuitry including an input terminal and an output terminal, the input terminal coupled to the terminal of the current mirror and the second current terminal of the third transistor, the output terminal coupled to the control terminal of the second transistor.