Capped MEMS Die via Depth-Varied Cavity Etching

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Solution Overview

Problem

MEMS devices are fragile and sensitive to contaminants, requiring protection from ambient factors like dirt and static electricity, which existing methods struggle to provide effectively while allowing for device operation.

Innovation Solution

A method of forming a capped die using a cap wafer with device cavities and deeper singulation cavities that circumscribe the device components, secured to a device wafer, and then partially removing the cap wafer to expose the deeper cavities for protection and singulation, using etching processes with separate masks to create cavities of varying depths.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If a cap is bonded onto the MEMS die to protect mechanical structures, then protection from contaminants is improved, but the complexity of the fabrication process increases

Engineering Contradiction:
Improveprotection from contaminantsVSAvoidfabrication process complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The cap wafer is segmented into multiple cavities of different depths - shallower device cavities for individual MEMS structures and deeper singulation cavities for separating dies. This segmentation allows the cap to serve multiple protective functions simultaneously while maintaining a unified fabrication approach.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The cap wafer is prepared in advance with pre-formed device cavities and deeper singulation cavities before bonding to the device wafer. This preliminary action simplifies the overall process by eliminating the need for subsequent singulation steps after bonding, as the deeper cavities enable direct separation of capped dies.

Inventive Principle:
Principle #10Preliminary action

2Productivity

If traditional singulation processes are used after bonding cap wafer to device wafer, then individual capped dies can be separated, but processing time and cost increase

Engineering Contradiction:
ImprovethroughputVSAvoidsingulation processing time
Core Design Contradiction:
ProductivityVSLoss of time

Solution Approach 1:

The cap wafer is pre-formed with deeper singulation cavities that extend through the cap thickness before bonding occurs. This preliminary preparation enables immediate separation of capped dies after bonding without requiring additional singulation processing steps, thereby reducing processing time and improving throughput.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The singulation function is extracted and performed in advance during cap wafer fabrication rather than after bonding. The deeper cavities are created beforehand to facilitate easy separation, removing the need for time-consuming post-bonding singulation operations.

Inventive Principle:
Principle #2Taking out (Extraction)

3Ease of operation

If the cap wafer is removed to expose deeper cavities for singulation, then individual capped dies can be formed, but the structural integrity may be compromised

Engineering Contradiction:
Improvesingulation easeVSAvoidcap wafer structural integrity
Core Design Contradiction:
Ease of operationVSStrength

Solution Approach 1:

The cap wafer is segmented into distinct device cavities and deeper singulation cavities. The singulation cavities are positioned between device cavities rather than through them, creating natural separation paths that maintain the integrity of individual device cavities while enabling easy die separation.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

Different regions of the cap wafer have different cavity depths - shallower device cavities for protection and deeper singulation cavities for separation. This local differentiation allows easy singulation in specific regions while maintaining structural integrity in the device protection regions.

Inventive Principle:
Principle #3Local quality

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach effectively protects MEMS structures from contaminants while allowing operation, reducing singulation processing steps and costs, and improving throughput by forming cavities of differing depths to enhance the robustness and reliability of MEMS devices.

Implementation Method 1

The wafer is etched to remove the oxide layer from the areas for the first cavities and the second cavities. The wafer is etched to remove wafer material from the areas for the second cavities. The wafer is etched once more. Now wafer material in areas not covered by the oxide layer is removed to form the first cavities and to further deepen the second cavities.

Methodology Applied
Scientific EffectEtching:

Implementation Method 2

Some embodiments backgrind the top side of the cap wafer to remove its top surface.

Methodology Applied
Scientific EffectGrinding:

Data Source

PatentUS9150408B2Method of etching a wafer
Publication Date: 2015.10.06 ANALOG DEVICES INC
  • US9150408B2 patent drawing
  • US9150408B2 patent drawing
  • US9150408B2 patent drawing

AI summary

A method of etching a plurality of cavities in a wafer provides a wafer having a patterned hard mask layer. The patterned hard mask has open areas defining locations for first cavities and second cavities. A mask is applied to cover the patterned hard mask layer. The mask is etched to remove wafer material from areas defined by the second cavities. The mask is removed and etching then removes wafer material except as prevented by the hard mask layer. This leaves the first cavities with a first depth and further deepens the second cavities to a depth greater than the first depth. By suitably configuring the second cavities, a capped die can be formed by securing the wafer to a second wafer and removing at least a portion of the unsecured side of the first wafer to expose the second cavities, thereby forming a plurality of caps on the second wafer.