Capping Liners for Memory Device Sidewall Protection
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Solution Overview
Problem
In the manufacturing of cross-point type memory devices, issues such as etch residues at the bottom portions of bit lines can lead to electrical short circuits and reduced etch rates, while overetching to prevent these residues can cause sidewall erosion and increased resistance due to bowing of conductive lines.
Innovation Solution
The formation of capping liners on the sidewalls of conductive lines serves as protection layers during the etching process, preventing undesirable erosion and bowing, and ensuring vertical or flat profiles, thereby maintaining low resistance and reliability.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If overetching is performed to prevent etch residues at the bottom portions of bit lines, then etch residues are reduced, but sidewall erosion and bowing of conductive lines occur leading to increased resistance
Solution Approach 1:
A capping liner is formed on the sidewall of the bit line before the etching process. This preliminary protective layer prevents sidewall erosion and bowing during overetching, allowing the etch to reach the substrate completely while maintaining vertical sidewall profiles and preventing electrical short circuits
2Ease of manufacture
If conventional etching is performed without capping liners, then the process is simpler, but sidewall erosion and bowing occur causing increased resistance
Solution Approach 1:
The capping liner acts as an intermediary protective layer between the etchant and the bit line sidewalls. This intermediate structure prevents direct contact between the etchant and conductive line sidewalls, eliminating sidewall erosion and bowing while maintaining process feasibility
3Manufacturing precision
If capping liners are formed on sidewalls of conductive lines, then sidewall protection and vertical profiles are achieved, but device structure becomes more complex
Solution Approach 1:
The protective function is segmented from the main etching process by introducing a separate capping liner layer. This segmentation allows the etching and protection functions to be independently optimized - the capping liner provides precise sidewall protection while the etching process maintains its effectiveness
Data Source
AI summary
A memory device including a plurality of first conductive lines arranged on a substrate and spaced apart from each other in a first direction parallel to a top surface of the substrate; a plurality of capping liners on sidewalls of each of the plurality of first conductive lines, the plurality of capping liners having top surfaces at a vertical level equal to top surfaces of the plurality of first conductive lines, and bottom surfaces at a vertical level higher than bottom surfaces of the plurality of first conductive lines; and an insulating layer on the substrate, the insulating layer filling spaces between the plurality of first conductive lines and covering sidewalls of the plurality of capping liners.