Capture-per-cycle scan chains reduce test application time
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Solution Overview
Problem
Scan-based testing in integrated circuits is inefficient due to the majority of test time being spent on shifting test data, with only a small percentage of cycles being used for actual testing, which is problematic for automotive electronics that require rapid and reliable test solutions to meet stringent safety standards.
Innovation Solution
The implementation of capture-per-cycle test points, which include configurable scan chains with signal-combining devices and clock-gating mechanisms, allows for test responses to be captured and shifted in a single clock cycle, reducing test application time without compromising fault coverage.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If scan-based testing is used to achieve high controllability and observability, then test quality is improved, but test application time increases significantly
Solution Approach 1:
The patent segments the test operation into two distinct modes: scan mode for high-quality testing and shift mode for rapid data movement. By dividing the functionality of scan chains into these separate operational modes, the system can achieve both high test quality (when needed) and fast test application (when possible), resolving the contradiction between test quality and test time
Solution Approach 2:
The patent introduces dynamic operational modes that allow scan chains to switch between scan mode and shift mode based on the testing requirements. This dynamic behavior enables the system to adapt its operation to minimize test time while maintaining test quality, directly addressing the contradiction by making the system flexible rather than static
2Device complexity
If scan chains are used to shift test patterns serially, then device complexity is reduced, but test application time increases due to sequential data movement
Solution Approach 1:
The patent employs periodic action by alternating between scan mode operation (for quality) and shift mode operation (for speed). The test system periodically switches between these two modes, allowing rapid shift operations to occur during shift mode while maintaining the ability to perform high-quality scanning when needed, thus reducing overall test time without significantly increasing device complexity
Solution Approach 2:
The patent changes the operational parameters of the scan chains by introducing a second mode (shift mode) with different characteristics from the traditional scan mode. This parameter change allows the system to operate at higher speeds during shift mode while maintaining the proven reliability of scan mode, resolving the time-complexity contradiction by offering a faster alternative parameter set
3Quantity of substance
If logic BIST is implemented to reduce test data volume, then test data requirements are reduced, but test application time increases due to extensive scan shifting
Solution Approach 1:
The patent segments the Logic BIST operation into scan mode for fault detection and shift mode for rapid pattern application. By dividing the BIST operation into these two modes, the system can apply test patterns quickly in shift mode while using scan mode only when actual testing is required, significantly reducing the overall test application time compared to traditional BIST that relies entirely on slow scan shifting
Solution Approach 2:
The patent enables continuous useful action by allowing the circuit to be tested continuously in shift mode without the need to stop for extensive scan shifting. The shift mode provides a continuous testing capability that maintains fault detection while eliminating the time-consuming scan shift operations, thus reducing test application time while maintaining test data volume efficiency
Data Source
AI summary
Various aspects of the disclosed technology relate to using capture-per-cycle test points to reduce test application time. A scan-based testing system includes a plurality of regular scan chains and one or more capture-per-cycle scan chains on which scan cells capture and compact test responses at predetermined observation points per shift clock cycle.