Carbon-Based Barrier Layers for Semiconductor Contact Structures

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Solution Overview

Problem

The semiconductor industry faces challenges in scaling down semiconductor devices due to increased complexity and the need for improved sidewall profiles of source/drain contact structures, which affects contact resistances and the integrity of dielectric barrier layers during etching processes.

Innovation Solution

The use of carbon-based barrier layers with high carbide-to-oxide etch selectivity and density, formed through specific deposition and remote plasma treatment processes, to minimize etching and maintain structural integrity while reducing device dimensions and manufacturing costs.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If device dimensions are scaled down to increase storage capacity and processing speed, then productivity and performance are improved, but manufacturing complexity and difficulty of maintaining sidewall profile integrity increase

Engineering Contradiction:

Improvestorage capacity and processing speedVSAvoidmanufacturing process complexity

Core Design Contradiction:

ProductivityVSDevice complexity

Solution Approach 1:

A carbide barrier layer is deposited on the sidewalls of contact plugs before the silicide formation etch process. This preliminary protective layer prevents etching of the dielectric barrier layer during subsequent processing steps, addressing the manufacturing complexity issue while enabling continued device scaling for improved productivity

Inventive Principle:

Principle #10Preliminary action

Solution Approach 2:

The carbide barrier layer serves as an intermediary protective layer between the etch process and the dielectric barrier layer. It selectively resists etching where needed (at the interface between silicide and dielectric) while allowing etching elsewhere, thus simplifying the overall manufacturing process by preventing damage without requiring complex process modifications

Inventive Principle:

Principle #24Intermediary (Mediator)

2Ease of manufacture

If conventional barrier layers are used during silicide layer formation, then ease of manufacture is maintained, but etching of dielectric barrier layers occurs causing harmful effects

Engineering Contradiction:

Improveprocess simplicityVSAvoidetching damage to dielectric barrier layers

Core Design Contradiction:

Ease of manufactureVSObject-affected harmful factors

Solution Approach 1:

The solution exploits the selective etching properties of the carbide barrier layer. The layer is designed to be etch-resistant during silicide formation but can be selectively removed later. This converts the potential harm of having an additional layer (increased complexity) into a benefit by providing automatic protection during the critical etching step, while the layer itself is eventually removed to avoid long-term complications

Inventive Principle:

Principle #22Blessing in disguise (Convert harm into benefit)

3Manufacturing precision

If carbon-based barrier layers with high etch selectivity are used to protect sidewalls, then sidewall profile integrity is improved, but device dimensions and manufacturing costs increase

Engineering Contradiction:

Improvesidewall profile integrityVSAvoiddevice dimensions

Core Design Contradiction:

Manufacturing precisionVSLength of stationary object

Solution Approach 1:

The carbide barrier layer is applied locally only on the sidewalls of contact plugs where protection is needed, rather than as a universal thick barrier throughout the device. This localized application maintains manufacturing precision for sidewall profiles while minimizing the impact on overall device dimensions and associated manufacturing costs

Inventive Principle:

Principle #3Local quality

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

These carbon-based barrier layers effectively prevent etching during silicide layer formation, maintain electrical isolation, and reduce parasitic capacitances, enabling smaller device dimensions and lower manufacturing costs without compromising performance.

Implementation Method 1

depositing a carbon-based layer in the first and second contact openings

Methodology Applied

Scientific EffectDeposition: Deposition (physical)

Implementation Method 2

performing a remote plasma treatment with radicals on the carbon-based layer to form a remote plasma treated layer

Methodology Applied

Scientific EffectPlasma treatment: Plasma

Implementation Method 3

carbon-based barrier layers with high carbide-to-oxide etch selectivity

Methodology Applied

Scientific EffectEtch selectivity:

Data Source

PatentUS20230009077A1Contact structures in semiconductor devices

Publication Date: 2023.01.12 TAIWAN SEMICONDUCTOR MANUFACTURING CO LTD

AI summary

A semiconductor device with different configurations of contact structures and a method of fabricating the same are disclosed. The method includes forming first and second fin structures on a substrate, forming n- and p-type source/drain (S/D) regions on the first and second fin structures, respectively, forming first and second contact openings on the n- and p-type S/D regions, respectively, forming a carbon-based layer in the first and second contact openings, performing a remote plasma treatment with radicals on the carbon-based layer to form a remote plasma treated layer, selectively removing a portion of the remote plasma treated layer, forming a p-type work function metal (pWFM) silicide layer on the p-type S/D region, and forming an n-type work function metal (nWFM) silicide layer on the pWFM silicide layer and on the n-type S/D region.