Carbon-Based Interconnects for Gap-Filling and Reliability
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Solution Overview
Problem
As integrated circuit feature sizes shrink, copper interconnect structures face challenges with gap-filling ability, electro migration, and increased resistivity due to size-dependent scattering effects, compromising manufacturing and reliability.
Innovation Solution
A self-selective, bottom-up growth method for carbon-based interconnect structures using 1-dimensional and 2-dimensional conduction features, eliminating the need for seed and barrier layers, and employing chemical vapor deposition instead of electrochemical plating, which enhances carrier transport and thermal conductivity.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of manufacture
If copper interconnect structures are used in reduced dimension trenches, then manufacturing is simplified, but gap-filling ability deteriorates and void formation occurs
Solution Approach 1:
The patent changes the material parameter from copper to carbon-based materials (graphene, carbon nanotubes) to fundamentally alter the filling behavior in reduced dimension trenches, enabling complete gap-filling without void formation while maintaining manufacturing simplicity
Solution Approach 2:
The patent employs composite carbon-based structures including graphene sheets and carbon nanotubes that combine the benefits of low resistivity with superior gap-filling capabilities, resolving the contradiction between manufacturing ease and filling quality
2Length of moving object
If copper interconnect dimensions are reduced, then device scaling is achieved, but resistivity increases due to size-dependent scattering effects
Solution Approach 1:
The patent changes the material composition from copper to carbon-based materials, which maintain low resistivity even at reduced dimensions due to their unique electronic structure and ballistic transport properties, eliminating the size-dependent scattering effects that plague copper interconnects
3Reliability
If copper interconnect structures are used, then electrical conduction is achieved, but electro migration compromises reliability
Solution Approach 1:
The patent replaces copper with carbon-based materials that are inherently resistant to electro migration, effectively eliminating this harmful effect and improving long-term reliability without requiring additional protective measures
Solution Approach 2:
The use of carbon-based composite materials (graphene, carbon nanotubes) provides both excellent electrical conduction and immunity to electro migration, simultaneously addressing both requirements
4Ease of manufacture
If seed and barrier layers are added to copper interconnect structures, then manufacturing is improved, but device complexity increases
Solution Approach 1:
The patent extracts and eliminates the seed and barrier layers from the interconnect structure by using carbon-based materials that can be directly deposited and patterned without requiring these additional functional layers, thereby reducing device complexity while maintaining or improving manufacturing capability
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach improves gap-filling in reduced dimension trenches, reduces electro migration, and increases current density while providing superior thermal conductivity, addressing the limitations of copper interconnects.
Implementation Method 1
a first conductive feature over the substrate and with materials of 1-dimensional conduction feature, a second conductive feature over the first conductive feature and with materials of 2-dimensional conduction feature
Implementation Method 2
enhances carrier transport and thermal conductivity
Data Source
AI summary
The present disclosure provides an interconnect structure, including a substrate, a first conductive feature over the substrate, a second conductive feature over the first conductive feature, and a dielectric layer surrounding the first conductive feature and the second conductive feature. A width of the first conductive feature and a width of the second conductive feature are between 10 nm and 50 nm. The present disclosure also provides a method for manufacturing an interconnect structure, including (1) forming a via opening and a line trench in a dielectric layer, (2) forming a 1-dimensional conductive feature in the via opening, (3) forming a conformal catalyst layer over a sidewall of the line trench, a bottom of the line trench, and a top of the 1-dimensional conductive feature, and (4) removing the conformal catalyst layer from the bottom of the line trench and the top of the 1-dimensional conductive feature.