Epitaxial Carbon Diffusion Barrier for Transistor Scaling

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Solution Overview

Problem

The scaling down of semiconductor integrated circuits leads to deep source/drain junction profiles and substantial damage to these regions, which can result in short-channel effects and transient-enhanced diffusion, requiring a balance between thermal budgets for damage cure and preventing further issues like over diffusion of dopants.

Innovation Solution

The implementation of a diffusion barrier structure with epitaxial carbon-containing layers and carbon implanted regions, which partially or completely prevent N-type dopants from diffusing into the substrate, reducing resistance and short-channel effects, while using a controlled thermal annealing process to activate dopants without aggravating the short-channel effect.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If thermal annealing is used to cure implantation damage in source/drain regions, then damage is reduced, but dopant over-diffusion and short-channel effects are aggravated

Engineering Contradiction:
Improvecure of implantation damageVSAvoidshort-channel effect
Core Design Contradiction:
ReliabilityVSObject-generated harmful factors

Solution Approach 1:

A carbon-containing epitaxial layer is formed in the source/drain regions before ion implantation to create a diffusion barrier. This preliminary action prevents dopant over-diffusion during subsequent thermal annealing processes, allowing damage cure without aggravating short-channel effects

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

Carbon is introduced as an intermediary substance that forms a diffusion barrier between the dopant source and the channel region. This intermediary layer allows thermal energy to pass through for damage cure while blocking dopant diffusion that causes short-channel effects

Inventive Principle:
Principle #24Intermediary (Mediator)

2Productivity

If scaling down is implemented to increase functional density, then production efficiency increases, but source/drain junction profiles become deep and damage increases

Engineering Contradiction:
Improvefunctional densityVSAvoidsource/drain region damage
Core Design Contradiction:
ProductivityVSObject-generated harmful factors

Solution Approach 1:

Carbon-containing epitaxial layers are formed in source/drain regions before scaling down and before ion implantation processes. This preliminary carbon incorporation creates a protective barrier that prevents subsequent implantation damage, enabling continued scaling to increase functional density

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The carbon concentration and epitaxial layer thickness are optimized to provide sufficient protection against implantation damage while maintaining compatibility with scaled-down device dimensions, allowing continued miniaturization for increased productivity

Inventive Principle:
Principle #35Parameter changes

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach effectively reduces the short-channel effect and enhances the 'on' current of transistors by controlling dopant diffusion, maintaining a high dopant concentration in source/drain regions without increasing thermal budgets, thus addressing the challenges of scaling down in semiconductor integrated circuits.

Implementation Method 1

implementation of a diffusion barrier structure with epitaxial carbon-containing layers and carbon implanted regions, which partially or completely prevent N-type dopants from diffusing into the substrate

Methodology Applied
Scientific EffectDiffusion barrier: Diffusion Barrier

Implementation Method 2

using a controlled thermal annealing process to activate dopants without aggravating the short-channel effect

Methodology Applied
Scientific EffectThermal annealing: Annealing

Data Source

PatentUS9865732B2Integrated circuits and methods of forming integrated circuits
Publication Date: 2018.01.09 PARABELLUM STRATEGIC OPPORTUNITIES FUND LLC
  • US9865732B2 patent drawing
  • US9865732B2 patent drawing
  • US9865732B2 patent drawing

AI summary

An integrated circuit includes a gate electrode and spacers along sidewalls of the gate electrode. The integrated circuit further includes a source/drain (S/D) region adjacent to the gate electrode. The S/D region includes a diffusion barrier structure at least partially in a recess of the substrate. The diffusion barrier structure includes an epitaxial layer having a first region and a second region. The first region is thinner than the second region, and the first region is misaligned with respect to the sidewalls of the gate electrode. The S/D region includes a doped silicon-containing structure over the diffusion barrier structure. The first region of the diffusion barrier structure is configured to partially prevent dopants of the doped silicon-containing structure from diffusing into the substrate. The second region of the diffusion barrier structure is configured to substantially completely prevent the dopants of the doped silicon-containing structure from diffusing into the substrate.