Carbon Etch Plasma Cycling for High-Aspect-Ratio Profile Control
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Solution Overview
Problem
The semiconductor industry faces challenges in etching recessed features in dielectric materials, particularly in high aspect ratio applications like 3D NAND structures, due to issues such as profile bowing, bottom critical dimension control, and local CD uniformity, which can lead to electrical failures in memory devices.
Innovation Solution
A cyclic etching method involving a deposition step, a clear step, and an etch step, using plasma compositions that change over time, is employed to control the etch profile, with each step being balanced differently in iterations to achieve desired feature shapes.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If a conventional etching process is used to etch recessed features in dielectric material, then the etching can be completed, but profile bowing occurs and local CD uniformity deteriorates
Solution Approach 1:
The patent applies periodic action by implementing a cyclic etching process that alternates between deposition steps (forming boron oxide on sidewalls) and etch steps (removing material). This periodic switching between protective deposition and aggressive etching prevents profile bowing while maintaining vertical sidewalls and uniform local CD throughout the high aspect ratio feature
Solution Approach 2:
The patent employs preliminary action by depositing boron oxide on the sidewalls before the main etching action occurs. This protective layer is formed in advance during the deposition step, preventing profile bowing and maintaining etch profile control during subsequent etching steps
2Length of moving object
If etching is performed to achieve high aspect ratio features, then feature depth increases, but bottom critical dimension control worsens
Solution Approach 1:
The patent implements feedback by continuously cycling between deposition and etching steps, where the deposition of boron oxide provides real-time protection to the sidewalls and etch front. This cyclic feedback mechanism maintains precise bottom critical dimension control even as feature depth increases to high aspect ratios
3Manufacturing precision
If etching is performed on carbon layer with patterned mask, then features are formed, but process development time increases
Solution Approach 1:
The patent applies parameter changes by systematically varying plasma composition, pressure, and power parameters during the cyclic deposition and etching steps. This optimized parameter control achieves precise feature formation in carbon layers while reducing process development time through efficient parameter tuning
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach allows for precise control of etch profiles, improving local CD uniformity, feature circularity, and etch rate, reducing process development time, and enhancing the performance of memory hole etch processes.
Implementation Method 1
exposing the substrate to a plasma to etch the feature into the substrate
Implementation Method 2
during the deposition step the plasma may be generated from a first plasma generation gas including an first oxygen source and a boron source, and exposing the substrate to the plasma during the deposition step results in forming boron oxide on sidewalls of the feature
Implementation Method 3
during the clear step the plasma may be generated from a second plasma generation gas including a second oxygen source and a halogen source, and exposing the substrate to the plasma during the clear step may result in removing boron oxide proximate an etch front within the feature
Implementation Method 4
during the etch step the plasma is generated from a third plasma generation gas including a third oxygen source, and exposing the substrate to the plasma during the etch step results in etching the feature isotropically at the etch front within the feature
Data Source
AI summary
Various embodiments herein relate to methods and apparatus for etching a substrate. The substrate is typically a semi-conductor substrate. In various implementations, the method involves receiving the substrate in a process chamber, the substrate including a carbon layer and a mask layer positioned over the carbon layer, where the mask layer is patterned to define where the feature will be etched in the carbon layer; and exposing the substrate to a plasma to etch the feature into the carbon layer of the substrate, wherein a composition of the plasma changes over time to provide at least a deposition step, a clear step, and an etch step, and wherein the deposition step, the clear step, and the etch step are cycled with one another until the feature reaches its final depth.


