Self-Aligned Carbon Nanostructure Transistor Gate Replacement
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Solution Overview
Problem
The integration of carbon nanostructures in electronic devices is hindered by the difficulty in establishing thin, uniform, and high-quality dielectrics on their surfaces, and the lack of a self-aligned carbon nanostructure contact process to reduce parasitic resistance.
Innovation Solution
A method involving a material stack with a gate dielectric material having a dielectric constant greater than silicon and a sacrificial gate material, where a carbon nanostructure is formed on the gate dielectric, and the sacrificial gate material is replaced with a conductive metal, enabling self-aligned metal semiconductor alloy portions to be formed.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If conventional dielectric deposition methods are used on carbon nanostructure surfaces, then the dielectric material can be deposited, but the dielectric quality is poor due to the absence of surface states and strong sp2 carbon bonds
Solution Approach 1:
A sacrificial gate material layer is introduced as an intermediary between the carbon nanostructure and the gate dielectric material. This sacrificial layer provides a suitable surface for dielectric deposition, and is later removed to expose the carbon nanostructure, thereby enabling high-quality dielectric formation without direct deposition on the difficult carbon surface
Solution Approach 2:
The sacrificial gate material is deposited beforehand to create a temporary surface that facilitates subsequent dielectric deposition. This preliminary action allows the dielectric to be formed with proper quality before the sacrificial material is removed, solving the surface preparation problem in advance
2Reliability
If carbon nanostructures are scaled down to reduce short-channel effects, then device performance improves, but the difficulty of forming high-quality thin dielectrics increases
Solution Approach 1:
The sacrificial gate material serves as a mediator that enables uniform thin dielectric deposition on scaled carbon nanostructures. By providing a compatible surface, it ensures consistent dielectric quality across the scaled device dimensions, maintaining manufacturing precision at smaller scales
3Reliability
If a self-aligned contact process is implemented to reduce parasitic resistance, then device performance improves, but the process complexity increases
Solution Approach 1:
The gate formation and contact alignment processes are merged into a single self-aligned operation. The metal semiconductor alloy portions are formed to be self-aligned to the material stack, eliminating the need for separate alignment steps and reducing overall process complexity while achieving low parasitic resistance
Data Source
AI summary
A self-aligned carbon nanostructure transistor is formed by a method that includes providing a material stack including a gate dielectric material having a dielectric constant of greater than silicon oxide and a sacrificial gate material. Next, a carbon nanostructure is formed on an exposed surface of the gate dielectric material. After forming the carbon nanostructure, metal semiconductor alloy portions are formed self-aligned to the material stack. The sacrificial gate material is then replaced with a conductive metal.