Care Area Compaction for Semiconductor Defect Map Filtering

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Solution Overview

Problem

Current semiconductor inspection processes face challenges in efficiently detecting defects on semiconductor specimens due to the high volume of care areas exceeding inspection capacity, leading to increased false alarms and noise, which can overload processing capacity and reduce yield.

Innovation Solution

A computerized system using a processing and memory circuitry to compact care areas into a set of compacted rectangles through an R-tree structure, minimizing non-care area inclusion while meeting inspection capacity, thereby optimizing defect detection and reducing false alarms.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Measurement precision

If all care areas are inspected individually, then defect detection sensitivity is improved, but inspection capacity is exceeded and processing time increases

Engineering Contradiction:
Improvedefect detection sensitivityVSAvoidinspection capacity
Core Design Contradiction:
Measurement precisionVSProductivity

Solution Approach 1:

The patent merges multiple care areas into a single compacted care area that encloses all individual care areas. This consolidation reduces the number of inspection regions from many individual care areas to one unified compacted area, thereby improving inspection capacity and processing efficiency while maintaining defect detection sensitivity across all original care areas.

Inventive Principle:
Principle #5Merging (Combining)

2Measurement precision

If all care areas are inspected individually, then defect detection sensitivity is improved, but false alarms and noise increase

Engineering Contradiction:
Improvedefect detection sensitivityVSAvoidfalse alarms and noise
Core Design Contradiction:
Measurement precisionVSObject-generated harmful factors

Solution Approach 1:

By merging multiple care areas into one compacted care area, the patent reduces the total number of inspection regions, which directly decreases the number of false alarms and noise generated during inspection while preserving the ability to detect defects in all original care areas.

Inventive Principle:
Principle #5Merging (Combining)

3Productivity

If care areas are compacted, then inspection capacity is improved and false alarms reduced, but non-care area inclusion increases

Engineering Contradiction:
Improveinspection capacityVSAvoidnon-care area inclusion
Core Design Contradiction:
ProductivityVSArea of stationary object

Solution Approach 1:

The patent performs preliminary actions by receiving design data and determining the optimal compacted care area configuration before inspection begins. This advance planning allows the system to minimize non-care area inclusion while ensuring all original care areas are covered, balancing inspection capacity improvement with reduced unnecessary inspection areas.

Inventive Principle:
Principle #10Preliminary action

Data Source

PatentUS11988613B2Care area based defect detection
Publication Date: 2024.05.21 APPL MATERIALS ISRAEL LTD
  • US11988613B2 patent drawing
  • US11988613B2 patent drawing
  • US11988613B2 patent drawing

AI summary

There is provided a system and method of assisting defect detection on a semiconductor specimen. The method includes obtaining a first map informative of multiple care areas (CAs) to be inspected on a die; creating a plurality of bounding rectangles (BRs) enclosing the multiple CAs; and compacting the plurality of BRs to a set of compacted rectangles to meet a predefined inspection capacity while attempting to minimize a non-CA area enclosed by the set of compacted rectangles, giving rise to a second map informative of the set of compacted rectangles. The compaction comprises constructing an R-tree structure representative of the plurality of BRs and compacted rectangles, and selecting a set of nodes from the R-tree structure based on the predefined inspection capacity and representative of the set of compacted rectangles. The second map is usable for filtering a defect map indicative of defect candidate distribution on the die.