Carrier Bonding via Surface Modification for Semiconductor Processing

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Solution Overview

Problem

Existing carrier-substrate solutions for semiconductor processing fail to provide sufficient support against warping and temperature-induced damage, especially during high-temperature FEOL processing, and are difficult to debond without damaging the wafer or carrier.

Innovation Solution

A method using surface modification layers on the carrier and thin sheet to control van der Waals and covalent bonding, allowing for strong adhesion during processing while enabling easy separation after high-temperature processing, using materials like hexamethyldisilazane, plasma polymerized fluoropolymer films, and silane treatments to manage bonding energies.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Strength

If adhesive is used to bond wafer to carrier, then wafer can be handled and supported during processing, but adhesive fails at high temperatures, outgasses contaminants, and causes warping due to CTE mismatch

Engineering Contradiction:
Improvebond strengthVSAvoidprocessing reliability
Core Design Contradiction:
StrengthVSReliability

Solution Approach 1:

The patent removes the adhesive layer from the bonding interface between carrier and wafer. Instead of using adhesive, it employs direct bonding through surface modification layers (such as silane treatments) that create temperature-stable bonds capable of withstanding high-temperature FEOL processing without outgassing or failing.

Inventive Principle:
Principle #2Taking out (Extraction)

Solution Approach 2:

The patent changes the bonding mechanism from adhesive-based to surface-modification-based bonding. By applying surface modification layers (e.g., silane treatments) to the carrier or wafer surfaces, it creates bonds that maintain stable bonding strength across high temperature ranges (up to 400-450°C), eliminating the temperature sensitivity and CTE mismatch issues of adhesive bonding.

Inventive Principle:
Principle #35Parameter changes

2Device complexity

If wafer is thinned to reduce packaging complexity, then packaging becomes simpler, but wafer becomes more fragile and susceptible to damage during handling

Engineering Contradiction:
Improvepackaging complexityVSAvoidwafer strength
Core Design Contradiction:
Device complexityVSStrength

Solution Approach 1:

The patent performs wafer thinning before bonding the wafer to the carrier, rather than after. This preliminary thinning action allows the wafer to be processed at its final thin thickness while still being supported by the carrier during subsequent handling and packaging operations, eliminating the need for post-thinning support structures.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The carrier acts as an intermediary support structure that protects the thinned wafer during handling and packaging. The carrier provides mechanical strength and rigidity to the otherwise fragile thinned wafer, enabling safe transportation and assembly operations without requiring the wafer to maintain its own structural integrity.

Inventive Principle:
Principle #24Intermediary (Mediator)

3Stability of the object's composition

If carrier provides strong support to prevent warping, then wafer stability improves, but debonding becomes difficult without damaging wafer or carrier

Engineering Contradiction:
Improvewafer stabilityVSAvoiddebonding ease
Core Design Contradiction:
Stability of the object's compositionVSEase of manufacture

Solution Approach 1:

The patent introduces surface modification layers (such as silane treatments or plasma polymerized fluoropolymer films) as intermediary layers between the carrier and wafer. These layers provide stable bonding during high-temperature processing while being designed to allow controlled debonding afterward, preventing direct strong bonding that would damage the wafer or carrier upon separation.

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The patent modifies the surface properties of the carrier or wafer through surface treatment techniques (silane treatment, plasma treatment, fluoropolymer coating). These surface modifications create bonds with appropriate strength characteristics: strong enough to prevent warping during processing, but with controlled debonding properties that allow clean separation afterward without damaging either component.

Inventive Principle:
Principle #35Parameter changes

4Ease of manufacture

If adhesive is used for bonding, then initial bonding is easy to achieve, but adhesive finds its way into vias and prevents metallization

Engineering Contradiction:
Improvebonding easeVSAvoidvia metallization precision
Core Design Contradiction:
Ease of manufactureVSManufacturing precision

Solution Approach 1:

The patent removes the adhesive layer from the bonding interface, eliminating the source of contamination that would otherwise migrate into vias and prevent metallization. By using direct surface-modification-based bonding, there is no adhesive material present to interfere with subsequent via filling and metallization processes.

Inventive Principle:
Principle #2Taking out (Extraction)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

Enables the processing of thin substrates through high-temperature semiconductor fabrication without warping or damage, allowing for the reuse of carriers and the preservation of delicate microstructures on the wafer.

Implementation Method 1

surface modification layers on the carrier and thin sheet to control van der Waals and covalent bonding

Methodology Applied
Scientific Effectvan der Waals force: Van der Waals Force

Implementation Method 2

surface modification layers on the carrier and thin sheet to control van der Waals and covalent bonding

Methodology Applied
Scientific Effectcovalent bonding: Chemical Bonding

Implementation Method 3

using materials like hexamethyldisilazane, plasma polymerized fluoropolymer films, and silane treatments to manage bonding energies

Methodology Applied
Scientific Effectbonding energy control: Chemical Bonding

Data Source

PatentEP3058587B1Carrier-bonding methods and articles for semiconductor and interposer processing
Publication Date: 2022.09.14 CORNING INC
  • EP3058587B1 patent drawingFigure 1~10
  • EP3058587B1 patent drawingFigure 2
  • EP3058587B1 patent drawingFigure 3~5

AI summary

A thin sheet (20) disposed on a carrier (10) via a surface modification layer (30) to form an article (2), wherein the article may be subjected to high temperature processing, as in FEOL semiconductor processing, not outgas and have the thin sheet maintained on the carrier without separation therefrom during the processing, yet be separated therefrom upon room temperature peeling force that leaves the thinner one of the thin sheet and carrier intact. Interposers (56) having arrays (50) of vias (60) may be formed on the thin sheet, and devices (66) formed on the interposers. Alternatively, the thin sheet may be a substrate on which semiconductor circuits are formed during FEOL processing.