Carrier Body Recessed Conductive Elements Fabrication
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Solution Overview
Problem
The existing methods for fabricating semiconductor packages, such as 3D chip stacking, are complex and costly due to the need for multiple carrier and adhesive attachments and removals, as well as a flipping process, which increases fabrication time and material consumption.
Innovation Solution
A method involving a carrier body with recessed portions where conductive elements are formed and received, allowing them to be exposed without removing the carrier body, eliminating the need for temporary materials like carriers and adhesives, and reducing the number of production steps and time.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If multiple carriers and adhesives are used for mounting and flipping processes, then the semiconductor package can be fabricated with proper alignment and connection, but the fabrication process becomes complex and costly with increased time and material consumption
Solution Approach 1:
The patent extracts and eliminates the temporary carrier and adhesive from the fabrication process. By forming conductive elements directly on the interposer that extend through to the back surface, the interposer itself serves as the mounting substrate, removing the need for separate carrier fixtures and adhesive materials, thus simplifying the process while maintaining alignment and connection quality
Solution Approach 2:
The interposer is given multiple functions: it serves as both the electrical interconnection substrate and the mechanical mounting platform. The conductive elements formed on the interposer perform dual roles of electrical connection and physical anchoring, eliminating the need for separate carrier and adhesive components, thereby reducing process complexity and material consumption
2Reliability
If carriers and adhesives are attached and removed multiple times, then the semiconductor chip can be properly positioned and connected, but the fabrication time increases significantly
Solution Approach 1:
The conductive elements are pre-formed on the interposer before chip mounting, extending through to the back surface. This preliminary formation of mounting structures eliminates the need for repeated carrier attachment and removal during the fabrication process, reducing fabrication time while ensuring accurate chip positioning through the pre-configured conductive element locations
3Ease of manufacture
If traditional mounting processes with carriers and adhesives are used, then the semiconductor package can be assembled, but material consumption and fabrication cost increase
Solution Approach 1:
The patent removes the adhesive material and carrier from the assembly process. By forming conductive elements that extend through the interposer to the back surface, the structure provides inherent mechanical support and mounting capability, eliminating the need for adhesive materials and temporary carrier fixtures, thus reducing material consumption while maintaining assembly feasibility
Solution Approach 2:
The patent eliminates the need to use and then remove temporary carrier materials and adhesives. The interposer with its conductive elements serves as a permanent structural component that remains in the final package, discarding the concept of temporary mounting materials and recovering material efficiency by making the conductive elements serve dual purposes
Data Source
AI summary
A method of fabricating an electronic package is provided, including: providing a carrier body having a first surface formed with a plurality of recessed portions, and a second surface opposing the first surface and interconnecting with the recessed portions; forming on the first surface of the carrier body an electronic structure that has a plurality of conductive elements received in the recessed portions correspondingly; and removing portion of the carrier body, with the conductive elements exposed from the second surface of the carrier body. Therefore, the carrier body is retained, and the fabrication cost is reduced since temporary material is required. The present invention further provides the electronic package thus fabricated.