Carrier Substrate TCV Packaging for Dense Die Integration
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
The semiconductor industry faces challenges in achieving smaller, more efficient packaging techniques for semiconductor dies due to limitations in miniaturization, thermal spreading, and integration density, which require innovative solutions for creating effective carrier substrates and package structures that enhance electrical connectivity and thermal management.
Innovation Solution
The development of a carrier substrate with through carrier vias (TCVs) embedded in an insulating body, where TCVs are formed using an electro-plating process to ensure high conductivity and quality, and integrated into package structures with redistribution layers and encapsulants to facilitate electrical and thermal connectivity.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If traditional packaging techniques are used, then manufacturing simplicity is maintained, but integration density and miniaturization are limited
Solution Approach 1:
The package structure is divided into distinct functional layers including carrier substrate, die, encapsulant, and redistribution structure. Each layer performs a specific function, allowing for modular manufacturing and assembly while achieving high integration density through systematic organization of components.
Solution Approach 2:
The patent transitions from planar packaging to three-dimensional packaging architectures. Through carrier vias penetrate vertically through the carrier substrate, and redistribution structures are formed on opposite surfaces, utilizing the vertical dimension to increase connection density without expanding the horizontal footprint.
2Manufacturing precision
If feature size is reduced continuously, then integration density improves, but thermal spreading capability deteriorates
Solution Approach 1:
The carrier substrate is constructed as a composite structure with an insulating body containing embedded conductive through carrier vias. This composite architecture provides both electrical connectivity through the vias and thermal management capabilities through the insulating body material, which can be selected for optimal thermal conductivity while maintaining electrical insulation.
Solution Approach 2:
The insulating body acts as an intermediary material between the semiconductor die and the external environment. It provides thermal pathways for heat dissipation while maintaining electrical insulation, effectively decoupling the thermal and electrical functions in the package structure.
3Ease of manufacture
If through carrier vias are formed using conventional methods, then manufacturing cost is reduced, but conductivity and quality deteriorate
Solution Approach 1:
The patent replaces conventional mechanical drilling and filling methods with an electro-plating process for forming through carrier vias. The electro-plating method deposits conductive material directly onto the insulating body, creating high-quality conductive pathways with superior conductivity and structural integrity compared to mechanical methods.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach reduces manufacturing costs and improves the quality of carrier substrates, enabling efficient electrical connectivity and thermal management within package structures, thereby supporting the miniaturization and integration density demands of the semiconductor industry.
Implementation Method 1
TCVs are formed using an electro-plating process to ensure high conductivity and quality
Data Source
AI summary
A package structure includes a carrier substrate, a die, and an encapsulant. The carrier substrate includes through carrier vias (TCV). The die is disposed over the carrier substrate. The die includes a semiconductor substrate and conductive posts disposed over the semiconductor substrate. The conductive posts face away from the carrier substrate. The encapsulant laterally encapsulates the die.