Carrier Substrate Trenches With Organic Patterns for Warpage Control

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Solution Overview

Problem

The use of carrier substrates in semiconductor manufacturing can result in warpage due to differences in thermal expansion coefficients between the substrate and the wafer being processed, affecting the reliability and performance of semiconductor packages.

Innovation Solution

Incorporating organic patterns with higher thermal expansion coefficients into the carrier substrate, specifically in trenches on the front and rear surfaces, to compensate for the thermal expansion differences and reduce warpage during heating and cooling processes.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If a carrier substrate is used in semiconductor manufacturing, then the wafer can be supported and processed, but warpage occurs due to differences in thermal expansion coefficients between the substrate and wafer

Engineering Contradiction:
Improvestructural integrityVSAvoidwarpage
Core Design Contradiction:
ReliabilityVSShape

Solution Approach 1:

The patent introduces trenches with organic materials at specific locations (front and rear surfaces) of the carrier substrate to create local regions with different thermal expansion properties. This local modification allows differential expansion/contraction at strategic points to compensate for overall warpage while maintaining structural integrity of the entire substrate.

Inventive Principle:
Principle #3Local quality

Solution Approach 2:

The patent explicitly utilizes thermal expansion principles by incorporating organic materials in trenches that have different thermal expansion coefficients than the main substrate material. During heating and cooling processes, these organic-filled trenches expand and contract at different rates, generating counteracting forces that reduce warpage of the carrier substrate.

Inventive Principle:
Principle #37Thermal expansion

2Shape

If organic patterns are incorporated into the carrier substrate to reduce warpage, then thermal expansion differences are compensated, but the device structure becomes more complex

Engineering Contradiction:
Improvewarpage reductionVSAvoidsubstrate structure
Core Design Contradiction:
ShapeVSDevice complexity

Solution Approach 1:

The patent divides the carrier substrate into distinct regions: the main substrate layer and separate trench structures. The trenches are segmented features that can be independently formed and filled with organic materials, allowing the complex warpage compensation function to be achieved through modular addition rather than redesigning the entire substrate structure.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The organic materials filled in the trenches act as intermediary elements between the front and rear surfaces of the carrier substrate. These intermediaries provide the necessary thermal expansion differential to compensate for warpage without requiring direct modification of the main substrate material or creating overly complex integrated structures.

Inventive Principle:
Principle #24Intermediary (Mediator)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The incorporation of organic patterns with higher thermal expansion coefficients reduces warpage, thereby improving the performance and reliability of semiconductor packages by maintaining structural integrity during manufacturing processes.

Implementation Method 1

differences in coefficients of thermal expansion between the carrier substrate and a wafer being processed

Methodology Applied
Scientific EffectThermal expansion: Thermal Expansion

Data Source

PatentUS20250210400A1Carrier substrate and method of manufacturing semiconductor package by using the same
Publication Date: 2025.06.26 SAMSUNG ELECTRONICS CO LTD
  • US20250210400A1 patent drawing
  • US20250210400A1 patent drawing
  • US20250210400A1 patent drawing

AI summary

A carrier substrate includes a main layer including and extending between a first surface and a second surface opposite to each other, a first trench extending from the first surface of the carrier substrate into the main layer, and a first organic pattern inside the first trench. A method of manufacturing a semiconductor package includes providing such a carrier substrate, disposing a semiconductor chip on the carrier substrate, and forming a redistribution layer electrically connected to the semiconductor chip.