Carrier-Integrated Transformer Layout for IC Shrinkage and Isolation
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Solution Overview
Problem
Conventional transformer arrangements face challenges in achieving space-saving designs while maintaining reliable signal transmission and galvanic isolation, as they require a minimum size for transformer windings, limiting the shrinkage of semiconductor dies.
Innovation Solution
A transformer arrangement featuring an electrically insulating carrier with inductively coupled windings, where the first and second windings are embedded or arranged on top of the carrier, allowing independent design of the integrated circuit and transformer, and providing electric isolation, enabling space-saving implementation and galvanic isolation between circuits.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If the transformer windings are made larger to ensure reliable signal transmission, then the signal transmission reliability is improved, but the overall device size increases
Solution Approach 1:
The patent merges the transformer windings and the integrated circuit onto a single semiconductor die. The first winding is formed over a first region of the semiconductor die, the second winding is formed over a second region, and the integrated circuit is formed over a third region, all integrated on the same die substrate. This integration allows the transformer and IC to be handled and packaged together as a single component while maintaining the required winding sizes for reliable signal transmission.
2Volume of moving object
If the semiconductor die size is reduced to save space, then the space efficiency is improved, but the transformer winding size becomes insufficient for reliable signal transmission
Solution Approach 1:
The patent utilizes three-dimensional space on the semiconductor die by forming the first winding over a first region, the second winding over a second region, and the integrated circuit over a third region. This spatial arrangement allows all components to coexist on a compact die without interfering with each other's required dimensions, enabling small die size while maintaining sufficient winding sizes for reliable signal transmission.
3Adaptability or versatility
If the transformer and integrated circuit are designed separately, then the design flexibility is improved, but the packaging and handling complexity increases
Solution Approach 1:
The patent combines the transformer and integrated circuit into a single semiconductor die, forming both components and their interconnections on the same substrate. This merger eliminates the need for separate packaging of the transformer and IC, as they are already integrated together. The bonding pads on the semiconductor die provide direct electrical connections between the windings and the integrated circuit, simplifying the packaging process while maintaining design flexibility.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This configuration allows for a compact transformer arrangement that can be handled and packaged like a single semiconductor die, enabling shrinkage of integrated circuits without affecting transformer size, while maintaining reliable signal transmission and galvanic isolation.
Implementation Method 1
a transformer including a first winding and a second winding that are inductively coupled
Data Source
Figure 1~3
Figure 4~5
Figure 6A~7B
AI summary
A transformer arrangement is disclosed. The transformer arrangement includes: an electrically insulating carrier (1); a first integrated circuit (2) including a first semiconductor die (20) embedded in or arranged on top of the electrically insulating carrier (1); and a transformer (3) including a first winding (31) and a second winding (32) that are inductively coupled. One of the first and second windings (31, 32) is connected to the first integrated circuit (2), and each of the first and second windings (31, 32) is embedded in or arranged on top of the electrically insulating carrier (1).