Automatic Cascaded Address Selection for Serial Bus Systems

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Solution Overview

Problem

Existing methods for configuring electronic circuits on a bus with unique addresses are either labor-intensive, requiring manual customization or complex manufacturing processes, increasing the risk of errors and complicating assembly.

Innovation Solution

The implementation of automatic cascaded address selection systems, where a host device assigns unique addresses to serially connected slave devices without manual configuration, using digital or analog address transmission methods, allowing for identical circuitry across devices and simplifying manufacturing.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If addresses are hardwired into each circuit, then each circuit has a unique address, but customization of each individual circuit is required, complicating manufacturing and fabrication

Engineering Contradiction:
Improveunique address assignmentVSAvoidmanufacturing complexity
Core Design Contradiction:
ReliabilityVSEase of manufacture

Solution Approach 1:

The system enables self-configuration of addresses through automatic cascaded address selection. When a slave device is powered on or reset, it automatically receives its address from the host device via the bus without requiring manual configuration or hardwiring. Each slave device reads the address transmitted on the bus during initialization and configures its address register automatically, eliminating the need for custom manufacturing of each circuit.

Inventive Principle:
Principle #25Self-service

2Reliability

If manual configuration with switches is used, then unique addresses can be assigned, but labor requirements increase and the risk of errors increases

Engineering Contradiction:
Improveunique address assignmentVSAvoidconfiguration labor
Core Design Contradiction:
ReliabilityVSEase of operation

Solution Approach 1:

The system eliminates manual configuration by enabling automatic address assignment. The host device automatically transmits addresses to slave devices through the bus during system initialization. Each slave device automatically reads and configures its address without human intervention, completely eliminating the need for manual switch configuration and associated labor and error risks.

Inventive Principle:
Principle #25Self-service

Solution Approach 2:

The patent replaces the mechanical switch-based address configuration system with an electronic digital communication system. Instead of physically manipulating switches on each device, addresses are transmitted electronically via digital signals on the bus, and slave devices automatically configure themselves through electronic reading and register setting, substituting mechanical operations with electronic automation.

Inventive Principle:
Principle #28Mechanics substitution (Replace mechanical system)

3Ease of manufacture

If identical circuitry is used across devices, then manufacturing is simplified, but manual address configuration is still required for each device

Engineering Contradiction:
Improvecircuit uniformityVSAvoidaddress configuration process
Core Design Contradiction:
Ease of manufactureVSDevice complexity

Solution Approach 1:

The system resolves the contradiction by enabling automatic address configuration through the bus. Slave devices with identical circuitry can be manufactured without individual customization because each device automatically receives its unique address from the host device during initialization. The self-configuration process occurs electronically through address transmission on the bus, eliminating the need for manual address setting despite uniform hardware.

Inventive Principle:
Principle #25Self-service

Data Source

PatentUS10013389B2Automatic cascaded address selection
Publication Date: 2018.07.03 AVAGO TECHNOLOGIES INTERNATIONAL SALES PTE LTD
  • US10013389B2 patent drawing
  • US10013389B2 patent drawing
  • US10013389B2 patent drawing

AI summary

An apparatus for addressing electronic circuits includes a host device comprising an address output, and a number of addressable electronic circuits, each comprising an address input, an address selection input and an address selection output, wherein the addressable electronic circuits are connected serially with each pair of the serially connected addressable electronic circuits connected by the address selection input and the address selection output.