Cascaded Sensing Chip Clock Distribution Beyond Source Drive Limits
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Solution Overview
Problem
The limitation of the driving ability of the clock source restricts the number of cascaded sensing chips, limiting the applicability of cascaded sensing systems in high requirement scenarios.
Innovation Solution
A sensing system with at least one chip branch, where each branch includes N sensing chips connected sequentially, utilizing a clock circuit to integrate and a frequency dividing circuit to divide the clock signal, allowing the working clock signal of subsequent chips to be provided by upper-stage chips, thus expanding the applicability of the system.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If multiple sensing chips are cascaded to improve angle resolution and detection distance, then the sensing performance is improved, but the number of cascaded chips is limited by the clock source driving ability
Solution Approach 1:
The clock source is segmented and distributed to each sensing chip individually. Each chip receives its own clock signal through dedicated wiring, eliminating the bottleneck of a single centralized clock source and allowing unlimited cascading of sensing chips.
Solution Approach 2:
A clock distribution network acts as an intermediary between the clock source and multiple sensing chips. This intermediary system efficiently distributes clock signals to all chips simultaneously, resolving the driving ability limitation.
2Productivity
If multiple sensing chips are cascaded to increase detection capability, then the detection performance is improved, but the clock source driving ability becomes a limiting factor
Solution Approach 1:
The clock distribution system is segmented into multiple independent paths, with each path connecting the clock source to a specific sensing chip. This segmentation ensures that each chip receives reliable clock signals regardless of the total number of cascaded chips.
3Device complexity
If a centralized clock source is used for multiple cascaded chips, then the system structure is simplified, but the number of cascaded chips is restricted
Solution Approach 1:
The clock source is designed with multi-functionality to simultaneously drive multiple sensing chips through a distribution network. This universal clock distribution system maintains structural simplicity while enabling unlimited cascading of chips.
Data Source
AI summary
The sensing system includes at least one chip branch. In the chip branch, a clock circuit of each sensing chip integrates the received working clock signal to obtain stable clock signal that has a relative high frequency to be subjected to frequency dividing, and a frequency dividing circuit performs frequency dividing processing on the clock signal to obtain a working clock signal required by a next-stage sensing chip. In the cascade structure, a clock source only needs to satisfy the driving requirement of a first-stage sensing chip, and the working clock signal required by each of other sensing chips is provided by a previous-stage sensing chip, such that the problem that the number of sensing chips connected in series in the chip branch is limited by the driving capability of the clock source is solved, and the applicability of the sensing system is widened.