Cascaded Semiconductor Chip Stack with Intermediary Support
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Solution Overview
Problem
Conventional mirror die packages face challenges in maintaining a small mold thickness while preventing bonding failures between semiconductor chips, as the upper chip is prone to warpage and damage due to the need for reduced thickness, leading to issues with flip chip bonding.
Innovation Solution
A semiconductor package design featuring a cascaded chip stack with exposed chip wire pads on the lower semiconductor chip, allowing for direct wire bonding to the substrate without intermediate wires, and flip chip bonding between the lower and upper chips, maintaining a reduced distance and preventing warpage.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Volume of moving object
If the thickness of the lower semiconductor chip and the upper semiconductor chip are reduced to maintain a small mold thickness, then the package size is reduced, but the upper semiconductor chip is prone to warpage and damage during flip chip bonding
Solution Approach 1:
A support structure is introduced as an intermediary element between the lower semiconductor chip and the upper semiconductor chip. This support structure provides mechanical reinforcement to the upper chip during the flip chip bonding process, preventing warpage and damage while allowing the chip thickness to remain reduced for compact packaging.
Solution Approach 2:
The support structure is positioned in advance to prevent potential warpage and damage to the upper semiconductor chip before the bonding process occurs. By providing pre-support, the structure eliminates the risk of bonding failures that would otherwise occur with thin chips.
2Reliability
If a wire bonding method is used with wires located between the lower semiconductor chip and the upper semiconductor chip, then electrical connection is achieved, but the distance between the chips must be constantly maintained, preventing further thickness reduction
Solution Approach 1:
The wire bonding process is eliminated by extracting the wire bonding function from the packaging structure. Instead of using wires to connect the chips, the invention uses direct flip chip bonding through bumps, removing the need for intermediate wires and the associated distance constraints.
3Volume of moving object
If the upper semiconductor chip is bonded on the lower semiconductor chip in a flip chip bonding method with reduced thickness, then the package size is reduced, but warpage or damage to the upper semiconductor chip occurs easily
Solution Approach 1:
The support structure acts as a mediator that temporarily reinforces the upper semiconductor chip during the bonding process. This intermediary support compensates for the reduced structural strength of thin chips, allowing them to withstand the stresses of flip chip bonding without warping or damaging.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This design enhances bonding reliability by eliminating warpage-induced damage and non-wet solder failures, while maintaining a compact package size by ensuring the upper chip's thickness is comparable to the lower chip's, thus improving the overall package reliability and reducing size.
Implementation Method 1
the first lower bump of the lower semiconductor chip may be bonded to the first upper bump of the upper semiconductor chip in a flip chip bonding method
Implementation Method 2
the first chip wire pad of the lower semiconductor chip may bonded to the first substrate wire pad of the package substrate in a wire bonding method
Data Source
AI summary
A semiconductor package that includes a package substrate, a lower semiconductor chip mounted on the package substrate, and an upper semiconductor chip stacked on the lower semiconductor chip in a cascade shape is provided. An active surface of the lower semiconductor chip is facing an active surface of the upper semiconductor chip.