Cascaded Image Processors Serial Data Transfer
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Solution Overview
Problem
High-resolution and high-speed image forming apparatuses face challenges in data transfer due to increased difficulty in adjusting timing between parallel signals at higher frequencies, leading to inefficient data transfer and increased costs with existing technologies like VbyOne, which restricts the upper limit of transmission rate and frequency.
Innovation Solution
An image processing device with cascaded image processors where only image data necessary for output is transferred, optimizing the transfer process by reducing the number of terminals and adjusting the transfer mode and frequency to achieve efficient data transfer without changing the assignment of bits per color.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Speed
If the frequency of image buses is increased to reduce transfer time, then the transfer speed is improved, but the difficulty of adjusting timing between parallel signals increases
Solution Approach 1:
The patent replaces the conventional parallel signal transmission system with a serial signal transmission system. Instead of using multiple parallel image buses that require complex timing adjustment at high frequencies, the invention uses a serial transmission interface that transfers image data bit-by-bit or byte-by-byte through a single channel, thereby eliminating the timing synchronization problems inherent in parallel systems at high frequencies.
2Productivity
If the number of bits is increased to achieve high speed transfer, then the transfer capacity is improved, but the number of terminals increases and cost increases
Solution Approach 1:
The patent transitions from a spatial dimension approach (increasing the number of parallel terminals) to a temporal dimension approach (increasing the transmission rate of a single serial channel). Instead of adding more parallel buses and terminals to increase data capacity, the invention achieves high transfer capacity by operating the serial interface at higher transmission rates, thereby reducing the number of required terminals while maintaining or improving data transfer capacity.
3Speed
If VbyOne is used to transfer all-color image data, then the transfer rate is limited to 3.75 Gbps, but using parallel signals before conversion restricts the frequency to maximum 125 MHz
Solution Approach 1:
The patent optimizes the parameters of the serial transmission interface by adjusting the transmission rate and data formatting to achieve efficient data transfer. Instead of being constrained by the fixed 3.75 Gbps limit of standard VbyOne or the frequency limitations of parallel-to-serial conversion, the invention modifies transmission parameters such as data packet structure, clock timing, and voltage levels to achieve higher effective transfer rates while maintaining signal integrity.
4Reliability
If all image data is transferred to downstream devices, then complete data is available, but unnecessary images are also transferred reducing transfer efficiency
Solution Approach 1:
The patent extracts and transfers only the necessary image data to downstream devices by implementing data filtering and selection mechanisms at the source. Instead of transferring all image data including unnecessary images, the invention identifies and extracts only the required data packets based on device-specific requirements, thereby reducing the overall data volume transferred while ensuring that each device receives exactly what it needs for its function.
Data Source
AI summary
An image processing device includes a plurality of image processors cascaded into a plurality of stages, the image processors each performing image processing on image data received, wherein an image processor other than an image processor in the final stage performs image processing on image data being part of image data input, and transfers the remaining image data to an image processor in a subsequent stage.