Cascaded LDO Regulator Eliminates External Decoupling Capacitors

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Solution Overview

Problem

Low-dropout regulator circuits require external decoupling capacitors, which increase component and system costs, board area, and can degrade noise performance due to noise coupling, making it challenging to meet stringent power supply rejection and output noise specifications.

Innovation Solution

A cascaded configuration of integrated low-dropout regulator circuits with a higher-bandwidth first LDO regulator and a lower-bandwidth second LDO regulator, eliminating the need for external capacitors and reducing noise specifications for reference circuits, while maintaining high power supply rejection and output noise performance.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If an external decoupling capacitor is used, then instantaneous load current demand can be met, but board area increases and component cost increases

Engineering Contradiction:
Improveinstantaneous load current responseVSAvoidboard area
Core Design Contradiction:
ReliabilityVSArea of stationary object

Solution Approach 1:

The patent combines the decoupling capacitor function with the LDO regulator by integrating a switch and capacitor directly on the chip. The switch couples the capacitor to the output node in response to load current demands, eliminating the need for external decoupling capacitors while maintaining instantaneous load response capability.

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The patent nests the decoupling capacitor and switch control circuitry within the LDO regulator integrated circuit structure. The capacitor is positioned on the chip and controlled by an internal switch, creating a nested configuration where the decoupling function is embedded within the regulator itself, reducing external component requirements.

Inventive Principle:
Principle #7Nested doll (Nesting)

2Reliability

If an external decoupling capacitor is used, then instantaneous load current demand can be met, but component and system cost increases

Engineering Contradiction:
Improveinstantaneous load current responseVSAvoidcomponent cost
Core Design Contradiction:
ReliabilityVSEase of manufacture

Solution Approach 1:

The patent combines the decoupling capacitor function with the LDO regulator by integrating a switch and capacitor directly on the chip. The switch couples the capacitor to the output node in response to load current demands, eliminating the need for external decoupling capacitors while maintaining instantaneous load response capability.

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The patent extracts the decoupling capacitor from the external component list and integrates it onto the chip. By taking the capacitor out of the external bill of materials and placing it on-chip with controlled coupling, the patent reduces component count and system cost while maintaining the necessary decoupling function.

Inventive Principle:
Principle #2Taking out (Extraction)

3Reliability

If an external decoupling capacitor is used, then load current demand can be met, but noise coupling degrades output noise performance

Engineering Contradiction:
Improveload current responseVSAvoidoutput noise
Core Design Contradiction:
ReliabilityVSObject-generated harmful factors

Solution Approach 1:

The patent introduces a switch as an intermediary between the capacitor and the output node. The switch is controlled in response to load current demands, allowing the capacitor to couple to the output only when needed. This intermediary control mechanism enables load response while minimizing noise coupling pathways.

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The patent makes the capacitor coupling dynamic by using a controlled switch rather than a permanent external connection. The switch couples the capacitor to the output node in response to load current demands, creating a dynamic coupling that activates only when needed, thereby reducing continuous noise coupling while maintaining load response capability.

Inventive Principle:
Principle #15Dynamics

Data Source

PatentUS9665112B2Circuits and techniques including cascaded LDO regulation
Publication Date: 2017.05.30 ANALOG DEVICES INT UNLTD CO
  • US9665112B2 patent drawing
  • US9665112B2 patent drawing
  • US9665112B2 patent drawing

AI summary

A regulator circuit can include a cascaded topology, comprising a first integrated low-dropout (LDO) regulator circuit having a supply node, the first integrated LDO regulator circuit configured to provide a first loop bandwidth and configured to provide a regulated first output voltage to an intermediate node using energy provided by the supply node, and a second integrated LDO regulator circuit having an input coupled to the intermediate node, the second LDO regulator circuit configured to provide a second loop bandwidth and configured to provide a regulated second output voltage to an output node, where the second loop bandwidth is narrower than the first loop bandwidth. The regulator circuit need not require an external capacitor. The regulator circuit can be used to provide one or more of enhanced power supply rejection and noise performance.