Cascaded LSB Interpolator DAC for High Resolution in Less Area

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Solution Overview

Problem

Existing digital-to-analog converters (DACs) with more than 7 bits require a large number of resistors and differential transconductance stages, leading to significant area consumption in integrated circuits, especially when separating the DAC into a string DAC section and an interpolator DAC section.

Innovation Solution

A DAC design that includes a string DAC section with MSB switching circuits and cascaded LSB interpolator sections, each with non-inverting and inverting inputs, allowing for voltage interpolation between coarse and fine representations of the digital input, reducing the number of differential stages and area requirements.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Quantity of substance

If the DAC is separated into a string DAC section and an interpolator DAC section, then the total number of resistors is reduced, but the number of differential transconductance stages increases requiring relatively large area

Engineering Contradiction:

Improvenumber of resistorsVSAvoidarea of interpolator DAC section

Core Design Contradiction:

Quantity of substanceVSArea of stationary object

Solution Approach 1:

The interpolator DAC section is segmented into multiple cascaded interpolator stages, where each stage handles a portion of the LSB subword. This divides the large single interpolator into smaller manageable stages, reducing the area required for each individual stage while maintaining the overall interpolation function.

Inventive Principle:

Principle #1Segmentation

Solution Approach 2:

The patent introduces a temporal dimension by processing the LSB subword in multiple sequential stages rather than simultaneously. The cascaded architecture processes bits through multiple passes, transforming a spatial area problem into a temporal sequence problem, thereby reducing the instantaneous area requirement.

Inventive Principle:

Principle #17Another dimension (Dimensionality change)

2Measurement precision

If more than 7 bits are implemented in a DAC, then the resolution increases, but the number of resistors becomes too large

Engineering Contradiction:

ImproveDAC resolutionVSAvoidnumber of resistors

Core Design Contradiction:

Measurement precisionVSQuantity of substance

Solution Approach 1:

The DAC is segmented into a string DAC section handling MSBs with a full resistor ladder, and an interpolator DAC section handling LSBs with a reduced resistor network. This segmentation allows high resolution without requiring a complete 2^N resistor ladder for all bits.

Inventive Principle:

Principle #1Segmentation

Solution Approach 2:

The patent introduces differential transconductance stages as intermediary elements that convert the voltage from the string DAC into current signals, which are then used to control switches in the interpolator section. This intermediary conversion enables resolution enhancement without direct proportional increase in resistor count.

Inventive Principle:

Principle #24Intermediary (Mediator)

Data Source

PatentUS11811420B2Digital-to-analog converter with cascaded least significant bit (LSB) interpolator circuit

Publication Date: 2023.11.07 TEXAS INSTRUMENTS INC

AI summary

A digital-to-analog converter (DAC) for converting a digital input word to an analog output signal includes a string DAC, a first interpolator and a second interpolator. The string DAC outputs a first voltage and a second voltage in response to M most significant bits of the digital input word. The first interpolator interpolates between the first and second voltages in response to middle Q least significant bits of the digital input word and provides a first interpolated voltage. The second interpolator interpolates between the first interpolated voltage and the second voltage in response to lower P least significant bits of the digital input word.