Cascaded PTAT Reference Circuit for Low Output Noise
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Solution Overview
Problem
Existing voltage reference circuits face challenges in minimizing noise contributions while providing an effective voltage reference, particularly in CMOS processes where high current gain factors are low, leading to output voltage noise deterioration.
Innovation Solution
A reference circuit utilizing cascaded proportional to absolute temperature (PTAT) cells with mirroring circuitry, featuring vertically stacked transistors and PMOS transistors to replicate currents and reduce noise, with resistors optimally set to achieve superior accuracy and minimize noise introduction.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Object-affected harmful factors
If conventional voltage reference circuits are used, then voltage reference functionality is provided, but noise contributions are high and output voltage noise deteriorates
Solution Approach 1:
The patent converts the inherently noisy operation of bipolar transistors into a benefit by using differential pairs where noise from one transistor is canceled by the other. The differential configuration transforms individual transistor noise into a canceling effect, achieving low noise output while maintaining the necessary voltage reference functionality.
Solution Approach 2:
The patent changes the operating parameters by using specific current density ratios between transistors in the differential pairs. By optimizing the collector current densities and using particular transistor sizing ratios, the circuit achieves minimum noise operation while maintaining the voltage reference function.
2Measurement precision
If resistor values are increased to improve voltage reference accuracy, then measurement precision improves, but noise voltage increases
Solution Approach 1:
The patent changes the resistor value parameters to optimized lower values that minimize thermal noise while maintaining sufficient voltage reference accuracy through the differential cancellation mechanism. The specific resistor values are selected to balance accuracy requirements against noise generation.
Solution Approach 2:
The patent uses the differential configuration to convert what would normally be significant resistor noise into a canceling effect, where noise from one path is subtracted from the other, allowing lower resistor values to be used without sacrificing accuracy.
3Productivity
If current gain factors are increased to improve circuit performance, then productivity improves, but device complexity increases due to additional circuitry
Solution Approach 1:
The patent merges multiple functions into the differential pair structure, which simultaneously provides current amplification, noise cancellation, and voltage reference generation. This integration achieves high performance without proportionally increasing complexity, as the same transistors perform multiple roles.
Solution Approach 2:
The differential pair circuit serves multiple functions: it provides current gain, cancels noise, generates the voltage reference, and sets bias currents for other stages. This multi-functionality achieves high productivity without linear increases in device complexity.
Data Source
AI summary
Reference circuits are described. In particular reference circuits that use a plurality of cascaded proportional to absolute temperature, PTAT, cells are described. In the circuits disclosed, currents of the low current density arm of first PTAT cell are mirrored into the high current density arms of a second PTAT cell such that any deviation of current in the low current density arm of the first cell will be replicated as the current in the high current density arm of the second cell. In this way low noise circuits can be provided.