Cascaded Scan Driving Circuit With Alternating Clock Input
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Solution Overview
Problem
Conventional flat panel display devices with scan driving circuits require a large number of input signals, increasing complexity and output from integrated chips, complicating the array process.
Innovation Solution
A scan driving circuit with cascaded first and second scan drivers that receive a clock signal alternately, each equipped with latch circuits, output circuits, and reset circuits, simplifying the signal transmission and reducing the number of input signals needed.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of operation
If a conventional scan driving circuit is used with multiple independent scan drivers, then the scanning function is achieved, but the amount of input signals increases and the array process complexity increases
Solution Approach 1:
The patent merges multiple independent scan drivers into a single integrated scan driving circuit that uses one clock signal to control all scan lines. This consolidation reduces the number of input signals from multiple separate drivers to a single unified circuit, thereby reducing array process complexity while maintaining the scanning function.
Solution Approach 2:
The scan driving circuit is designed as a universal circuit that can control multiple scan lines using a single clock signal. The circuit performs multiple functions (controlling different scan lines) through one unified structure, eliminating the need for multiple specialized drivers and reducing overall system complexity.
2Ease of operation
If multiple independent scan drivers are used to control scanning lines, then the scanning function is achieved, but the output from integrated chip increases
Solution Approach 1:
The patent combines multiple scan driver functions into a single integrated circuit block on the chip. This merging reduces the total output from the integrated chip by eliminating redundant driver circuits, while still providing the capability to control all necessary scan lines through the unified circuit design.
Data Source
AI summary
The disclosure discloses a flat panel display device and a scan driving circuit thereof. The scan driving circuit includes a plurality of first scan drivers and a plurality of second scan drivers that are cascaded, the plurality of first scan drivers and the plurality of second scan drivers receive a clock signal alternately. The plurality of first scan drivers and the plurality of second scan drivers perform cascaded transmission according to the clock signal. The disclosure performs cascaded transmission by interposing a clock signal, which can reduce the amount of input signals and simplify the array process.