Cascode Amplifier Topology for Wide-Range Linearity

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Solution Overview

Problem

Cascode amplifiers exhibit non-proportional output voltage changes with large input voltage variations due to the square law and channel length modulation of NMOST, leading to reduced linearity.

Innovation Solution

The cascode amplifier design incorporates a first common-source amplifier, a common-gate amplifier, a source follower, and a load with an inductor for DC coupling, along with optional distributed amplifiers and neutralization capacitors to enhance linearity and provide a higher degree of freedom in circuit design.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Manufacturing precision

If a conventional cascode amplifier is used, then the circuit structure is simple, but the linearity deteriorates due to square law and channel length modulation

Engineering Contradiction:
ImprovelinearityVSAvoidcircuit structure
Core Design Contradiction:
Manufacturing precisionVSDevice complexity

Solution Approach 1:

The amplifier is segmented into multiple functional blocks: common-source amplifier stage, common-gate amplifier stage, and source-follower stage. Each stage performs a specific function (voltage-to-current conversion, current transport, voltage reconstruction with linearity correction), allowing the complex linearity improvement task to be divided into manageable segments that can be designed and optimized independently

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent introduces intermediate nodes and components as mediators: the first node (N1) serves as an intermediate current node between the common-source and common-gate stages, while the source-follower stage acts as an intermediary that reconstructs the output voltage with improved linearity by compensating for non-linearities introduced in earlier stages

Inventive Principle:
Principle #24Intermediary (Mediator)

2Adaptability or versatility

If the input voltage varies large, then the operational range is wide, but the output voltage becomes non-proportional due to NMOST nonlinearity

Engineering Contradiction:
Improveoperational rangeVSAvoidlinearity
Core Design Contradiction:
Adaptability or versatilityVSManufacturing precision

Solution Approach 1:

The source-follower stage provides a form of negative feedback where the output voltage is indirectly fed back to adjust the intermediate node voltage, compensating for non-linearities. The source-follower's high input impedance and low output impedance characteristics allow it to stabilize the intermediate node while maintaining signal integrity across a wide input range

Inventive Principle:
Principle #23Feedback

Solution Approach 2:

The circuit employs dynamic biasing and voltage adjustment mechanisms that adapt to large input signal variations. The common-gate stage's source voltage is dynamically adjusted through the source-follower to maintain proper bias conditions and linearity throughout the operational range, allowing the amplifier to handle both small and large input signals effectively

Inventive Principle:
Principle #15Dynamics

Data Source

PatentUS12531517B2High-linearity cascode amplifier and method thereof
Publication Date: 2026.01.20 REALTEK SEMICON CORP
  • US12531517B2 patent drawing
  • US12531517B2 patent drawing
  • US12531517B2 patent drawing

AI summary

A cascode amplifier includes a first common-source amplifier (CSA) having a first MOST (metal oxide semiconductor transistor) of a first type configured to receive a first input signal and output a first current to a first node; a first common-gate amplifier (CGA) having a second MOST of the first type and configured to receive the first current from the first node and output a second current to a second node in accordance with a first bias voltage; a first source-follower (SF) having a third MOST of a second type configured to receive a second input signal and output a first voltage at the first node; and a load configured to establish a third voltage at a third node in response to the second current through a DC (direct current) path between the second node and the third node.