Cascode Power Amplifier Feedback for Receiving-Band Noise Suppression
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Solution Overview
Problem
Existing power amplifier circuits experience noise interference due to cascode configuration, which can degrade receiving sensitivity by mixing noise into the transmission signal, especially when the noise frequency falls within the receiving band.
Innovation Solution
A power amplifier circuit design that includes a first transistor, a bias circuit, a second transistor, and feedback circuits to control the gain and suppress noise, where the second transistor is cascode-connected to the first transistor, and feedback circuits are used between the collector/drain and base/gate to reduce the gain and prevent noise amplification.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Stability of the object's composition
If a cascode configuration is used with an upper-stage transistor to restrict collector current changes, then output power stability is improved, but noise is mixed into the transmission signal and receiving sensitivity deteriorates
Solution Approach 1:
A current restriction circuit is introduced as an intermediary component between the lower-stage transistor and the upper-stage transistor. This circuit restricts the collector current of the lower-stage transistor without requiring the upper-stage transistor to directly control it, thereby preventing noise mixing while maintaining output power stability.
Solution Approach 2:
The function of current restriction is separated from the upper-stage transistor and assigned to a dedicated current restriction circuit. This segmentation allows the upper-stage transistor to focus on its primary amplification function while the current restriction circuit handles current control, reducing noise interference.
2Adaptability or versatility
If a cascode configuration is used to suppress output power changes, then power control capability is improved, but noise appears at the collector of the upper-stage transistor
Solution Approach 1:
The current restriction circuit serves as a mediator that controls the collector current of the lower-stage transistor independently. This prevents the upper-stage transistor from directly modulating the current, thereby suppressing noise generation while preserving power control capability through the bias circuit.
Solution Approach 2:
The bias circuit provides feedback control to manage the operating point of the transistors. By adjusting the bias current or voltage based on control signals, the system maintains power control capability while the current restriction circuit prevents excessive current variations that would generate noise.
3Adaptability or versatility
If bias current is made variable to control output power level, then power level control is improved, but output power fluctuates unexpectedly
Solution Approach 1:
The bias circuit implements feedback control by monitoring the operating conditions and adjusting the bias current or voltage accordingly. This feedback mechanism stabilizes the output power level while still allowing variable power control through control signals, preventing unexpected fluctuations.
Solution Approach 2:
The system controls output power by changing the bias current or voltage parameters in a controlled manner. The current restriction circuit ensures that these parameter changes do not cause excessive current variations in the lower-stage transistor, thereby maintaining stability while enabling power level control.
Data Source
AI summary
The present disclosure provides a power amplifier circuit capable of suppressing the occurrence of noises while enabling control of an output power level. The power amplifier circuit includes a first transistor that amplifies a first signal; a bias circuit that supplies a bias current or voltage based on a control signal to the first transistor; a second transistor to which a control current based on the control signal is supplied, which has an emitter or a source thereof connected to a collector or a drain of the first transistor, and from which a second signal obtained by amplifying the first signal is output; and a first feedback circuit provided between the collector or the drain of the second transistor and the base or the gate of the second transistor.