Low-Voltage Cascode Beta-Multiplier Startup Circuit

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Solution Overview

Problem

Existing self-biased reference circuits, particularly beta-multiplier circuits, face issues with high power consumption during startup due to large inrush currents and significant supply voltage dependence, which are not compatible with low-power applications and sensitive analog circuits.

Innovation Solution

A dual-stage startup circuit for a low-voltage cascode beta-multiplier reference circuit that reduces the minimum supply voltage required for operation by using a first switch connected between NMOS and PMOS cascode bias voltages and a second switch connected to an inner drain-source connection, ensuring proper startup without exceeding the minimum operating voltage.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If a traditional startup circuit is used to force the self-biased reference circuit into the active state, then the circuit can start up properly, but large inrush currents are generated causing high power consumption

Engineering Contradiction:
Improvestartup reliabilityVSAvoidpower consumption during startup
Core Design Contradiction:
ReliabilityVSUse of energy by moving object

Solution Approach 1:

The startup circuit dynamically adjusts the bias voltages applied to cascode transistors during the startup process. By controlling the timing and magnitude of voltage application, the circuit enables proper startup while limiting inrush current and reducing power consumption compared to traditional fixed bias startup methods

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The circuit changes the bias voltage parameters applied to cascode transistors during startup. Specifically, it applies controlled voltage shifts to gate terminals of cascode devices, enabling the reference circuit to transition to active state with reduced current draw and lower power consumption

Inventive Principle:
Principle #35Parameter changes

2Reliability

If high bias voltages are applied to ensure proper startup of cascode current mirrors, then the circuit starts reliably, but the minimum supply voltage requirement increases

Engineering Contradiction:
Improvestartup reliabilityVSAvoidminimum supply voltage requirement
Core Design Contradiction:
ReliabilityVSStress or pressure

Solution Approach 1:

The circuit dynamically controls bias voltage application to cascode transistors, applying voltages only when needed during startup and adjusting them based on circuit state. This dynamic control allows reliable startup while keeping the minimum supply voltage requirement low, as voltages are applied selectively rather than continuously

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The startup circuit performs preliminary biasing of cascode transistors before the main reference circuit operates. By pre-establishing appropriate voltage conditions on cascode gate terminals, the circuit ensures reliable startup without requiring high continuous supply voltages, thus reducing the minimum supply voltage requirement

Inventive Principle:
Principle #10Preliminary action

3Device complexity

If simple current mirrors are used in the beta-multiplier circuit, then the circuit is simple to construct, but the output current has strong supply voltage dependence

Engineering Contradiction:
Improvecircuit complexityVSAvoidsupply voltage independence
Core Design Contradiction:
Device complexityVSReliability

Solution Approach 1:

The circuit introduces asymmetric cascode structures to the current mirrors, where cascode transistors are added to specific mirror branches to create voltage independence. This asymmetric modification provides supply voltage independence while maintaining reasonable circuit complexity, as cascode devices are added only where needed rather than throughout the entire circuit

Inventive Principle:
Principle #4Asymmetry

Data Source

PatentEP2498162B1Startup circuit for low voltage cascode beta multiplier current generator
Publication Date: 2014.04.30 DIALOG SEMICON GMBH
  • EP2498162B1 patent drawingFigure 1
  • EP2498162B1 patent drawingFigure 2
  • EP2498162B1 patent drawingFigure 3

AI summary

A self-biased reference circuit device (100) includes a first cascode current mirror (116), a second cascode current mirror (118), and a startup circuit (108). The first cascode current mirror (116) is capable to generate a first bias voltage (136) and a second bias voltage (140) in response to a first current and to generate a second current in response to the first and second bias voltages. The second cascode current mirror (118) is capable to generate a third bias voltage (164) in response to the second current, to generate a fourth bias voltage (168) in response to a third current, and to generate the first current in response to the third and fourth bias voltages. The startup circuit includes a first switch (188) and a second switch (196). The first switch (188) is capable to connect the first bias voltage (136) and fourth bias voltage (168) during startup. The second switch (196) is capable to connect the third bias voltage (164) and an inner drain-source connection (130) in the output stage of the first cascode current mirror (116) during startup.